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Keywords: Design Verification Engineer - External IP, Location: San Jose, CA

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Design Verification Engineer - External IP

We are seeking a Design Verification Engineer to join our External IP DV team. You will work with vendors, and ensure...Design Verification Team - External IP Team About Etched Etched is building AI chips that are hard-coded...

Company: Etched
Location: San Jose, CA
Posted Date: 13 Sep 2025
Salary: $15000 - 27000 per year

Lead Applications Engineer – DDR Design IP

on memory subsystem verification and/or performance analysis · Knowledge of System Verilog and FPGA design · Knowledge... Cadence IP team develops industry leading IPs that enable customers in a variety of markets - from the endpoint to the edge...

Posted Date: 05 Oct 2025
Salary: $102900 - 191100 per year

Lead Verification Engineer

Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead MTS Verification... and engineers in the world to develop products that make data faster and safer. As a Lead MTS Verification Engineer, the candidate...

Company: Rambus
Location: San Jose, CA
Posted Date: 23 Nov 2025

CAD Design Engineer

your career. THE ROLE: As a design engineer in our CAD and methodology team, you will be responsible for leading... design, and verification in general. You are a team player who has excellent communication skills and experience...

Posted Date: 23 Nov 2025

Senior ASIC Engineer

developer of custom ASICs and SoCs for emerging technologies as a Senior ASIC Design Engineer in San Jose! This role is ideal... with customers to refine requirements and ensure successful delivery. Drive design reviews, documentation, verification support...

Company: Top Engineer
Location: San Jose, CA
Posted Date: 20 Nov 2025
Salary: $180000 - 230000 per year

Embedded Adaptive Hardware Engineer

Design Engineer Location: San Jose, CA (Hybrid) Time Type: Full time Job Type: Regular Hiring Manager: Fang-Li Yuan... to the advanced technology nodes, such as TSMC 16FFC, TSMC N4/N5. Integrating the eFPGA IP in the chip with the SoC design...

Company: Analog Devices
Location: San Jose, CA
Posted Date: 09 Nov 2025

R&D Engineer Adv Tech Dev

Knowledge and use of various EDA offerings from major EDA suppliers in semiconductor industry for IP and chip design Working... knowledge of IP and chip design flow for analog and digital Experience with parametric and yield data analysis. Proficiency...

Company: Broadcom
Location: San Jose, CA
Posted Date: 29 Oct 2025
Salary: $120000 - 192000 per year

Senior Custom ASIC Engineering Lead

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas..., you will be required to do the following: Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP...

Company: Broadcom
Location: San Jose, CA
Posted Date: 07 Nov 2025