Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: ASIC RTL Design -Sr Staff, Location: Bangalore, Karnataka

Page: 1

ASIC/RTL Design Engineer(DDR)- Staff

General Summary: Skills & Experience MTech/BTech in EE/CS with 7+ years of ASIC design experience. Experience in micro...-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA Good...

Company: Qualcomm
Posted Date: 06 Jul 2025

ASIC/Subsystem hardware architect-Staff

in ASIC design for AI to join our dynamic team. The ideal candidate will have a strong background in hardware design... of ASIC design tools and methodologies. Excellent problem-solving and analytical skills. Ability to work effectively...

Company: Qualcomm
Posted Date: 18 May 2025

Staff Digital Design Engineer

by working closely with system architects Translate the design specification to optimal digital micro-architecture RTL coding... from a reputed institute 10 years of relevant experience Strong engineering background in embedded system design, including ASIC...

Posted Date: 13 Jun 2025

Senior Staff Physical Design Engineer

. What You Can Expect As a Senior Staff Physical Design Engineer (PnR), you will be part of our Implementation team and responsible...-performance ASIC chips in leading-edge CMOS process technology. Work with design teams across various disciplines...

Company: Marvell
Posted Date: 31 May 2025

Design Verification Senior Staff Engineer

/Enterprise and Automotive Compute market segments. The team focusses on the Custom ASIC business, Cloud AI solutions & Enterprise... VIP’s ( ARM, Cadence, Synopsys, etc), develop test cases (UVM & assembly), verify and do coverage analysis in RTL and gate...

Company: Marvell
Posted Date: 05 Jul 2025

Design Verification Senior Staff Engineer

/Enterprise and Automotive Compute market segments. The team focusses on the Custom ASIC business, Cloud AI solutions & Enterprise... VIP’s ( ARM, Cadence, Synopsys, etc), develop test cases (UVM & assembly), verify and do coverage analysis in RTL and gate...

Company: Marvell
Posted Date: 04 Jul 2025

Senior Staff Design Engineer

to 12years. Must be strong in scripting using Perl/Python Must be familiar with RTL design for ASIC development using... for RTL design for integration of IO pads into SoC, building the required multiplexing logic and necessary power control...

Company: Infineon
Posted Date: 25 Jun 2025

Senior Staff Design Engineer

to 12years. Must be strong in scripting using Perl/Python Must be familiar with RTL design for ASIC development using... for RTL design for integration of IO pads into SoC, building the required multiplexing logic and necessary power control...

Company: Infineon
Posted Date: 24 Jun 2025

Staff Engineer, Physical Design

with the RTL design team to drive modifications that address congestion and timing issues. Additionally, your involvement... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Posted Date: 22 Jun 2025

Senior Staff Engineer, Physical Design

at Marvell. Key responsibilities include: Work with design teams across various disciplines such as Digital/RTL/Analog... with RTL design teams to drive assembly and design closure. Provide technical direction, coaching, and mentoring to junior...

Company: Marvell
Posted Date: 22 Jun 2025

Senior Staff Engineer - Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact This position is with ASIC design..., collaborating closely with the RTL design team to drive modifications that address congestion and timing issues. Collaboration...

Company: Marvell
Posted Date: 28 May 2025

Senior Staff Engineer-Physical Design

. You will play a crucial role in developing and implementing timing and logic ECOs, collaborating closely with the RTL design team... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Posted Date: 14 May 2025

Graphics Performance Modelling Staff Engineer

, Electrical Engineering, or related field. 2+ years of experience with ASIC design and verification 2+ years of experience...+ years of experience with VLSI design and verification 5+ years of experience with low-power ASIC design techniques...

Company: Qualcomm
Posted Date: 13 Jun 2025

Staff DFT Engineer

India in Marvell is a Custom Logic Design and Methodology group responsible for delivering complex ASIC chips. This group..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Central Engineering (CCDS) - ASIC...

Company: Marvell
Posted Date: 13 Jun 2025

SoC STA/Timing Engineer (Lead/Staff)

Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS : ICC... noise, Signal Integrity, Layout Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows...

Company: Qualcomm
Posted Date: 12 Jun 2025

SoC STA/Timing Engineer - Staff/Senior Staff

Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus... environment Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS...

Company: Qualcomm
Posted Date: 11 Jun 2025

Staff GPU Verification Engineer

of ASIC design methodologies, flows and tools Be able to plan, estimate and track your own work Experience working... and closure Participate in all stages of design specification definition providing feedback from the verification perspective...

Posted Date: 08 Jun 2025

STA/Timing Methodology Engineer (Senior/Lead/Staff)

TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus Familiar... through handling, Knowledge of ASIC back-end design flows, methods, and tools (ICC2, Innovus) Knowledge of Spice...

Company: Qualcomm
Posted Date: 23 May 2025

Snr STA Engineer

, Architecture and ASIC/Mixed signal chip developments Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis...Job Category: Engineering Degree Level: Bachelors Job Description: OnSemi is seeking a Staff Physical Design Engg...

Company: onsemi
Posted Date: 16 May 2025