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Keywords: CPU Server Physical Design Timing Engineer, Location: Santa Clara, CA

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CPU Server Physical Design Timing Engineer

: In this role you will have the opportunity to define, develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical... Design Timing Engineer, you will work with microarchitecture and RTL design team to develop timing constraints, drive...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 24 Jul 2025

CPU Server Floorplan and Integration Engineer

solutions that are highly optimized for the needs of the server product. As a CPU Floorplan and Integration Engineer..., you will work with microarchitecture, RTL design and physical design teams to design, floorplan and integrate the CPU designs...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 24 Jul 2025

Design-for-Test (DFT) Engineer

, secure, and performance-optimized compute. As a Design-for-Test Engineer, you’ll help ensure silicon reliability and debug... across the chip lifecycle. You'll collaborate cross-functionally with design, verification, and physical design teams...

Company: Initio Capital
Location: Santa Clara, CA
Posted Date: 04 Aug 2025

Senior Design For Test Engineer

compared to CPU-based alternatives Microsoft DPU team in Santa Clara is looking for a Senior Design For Test Engineer to help... and validation for various fault models Timing constraint development for DFT structures Design and integrate test structures...

Company: Microsoft
Location: Santa Clara, CA
Posted Date: 18 Jul 2025

Silicon Engineer II

performance compared to CPU-based alternatives We’re seeking a Physical Design Engineer. As part of our DPU silicon team... and drive them tapeout, meeting all timing, physical, electrical, and manufacturing requirements: Perform early design...

Company: Microsoft
Location: Santa Clara, CA
Posted Date: 27 Jul 2025