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Keywords: DDR Verification Engineer, Location: Folsom, CA

Page: 1

Analog Design Engineer

and implementation of high speed and high precision memory interface PHY circuits for DDR, LPDDR and GDDR. This team owns a wide variety... and timing analysis, and reliability checks. Interface with cross-functional teams like RTL, Verification and Physical Design...

Location: Folsom, CA
Posted Date: 21 Dec 2025