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Keywords: Design Engineer - Memory Subsystem, Location: Bangalore, Karnataka

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Hardware Verification Engineer

-architecture verification * Multi-processor cache coherency, Memory subsystem verification. * IO subsystem knowledge, any of the...Introduction As a ASIC Processor Verification Engineer , you'll get to work on the systems that are driving the...

Company: IBM
Posted Date: 08 Jan 2026

Hardware Verification Engineer

-architecture verification * Multi-processor cache coherency, Memory subsystem verification. * IO subsystem knowledge, any of the...Introduction As a ASIC Processor Verification Engineer , you'll get to work on the systems that are driving the...

Company: IBM
Posted Date: 08 Jan 2026

CPU Performance & Power Analyst/Sr Staff Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... and performance team. Responsible for analyzing the performance aspects of Snapdragon CPU subsystem and influence the same...

Company: Qualcomm
Posted Date: 03 Jan 2026

Senior Engineer - Platforms Software (Wearables)

General Summary: Role Summary We are seeking a hands-on, domain-strong engineer to architect, build, and optimize embedded...-power, memory-constrained embedded systems. Strong understanding of embedded application development and integration...

Company: Qualcomm
Posted Date: 25 Dec 2025

Lead Engineer Senior - LPAI Systems

Audio and Always On / Edge AI subsystems and platforms. The ASIC Audio/Edge AI Systems Engineer is responsible for system... architecture definition activities supporting a sophisticated multimedia Low Power Audio/Edge AI subsystem across a broad range...

Company: Qualcomm
Posted Date: 24 Dec 2025

Software Engineer- Networking

Software Engineer- Networking This role has been designed as ‘’Onsite’ with an expectation that you will primarily... hardware compatibility and/or influences hardware design. What you need to bring : Experience & Education: BS/MS...

Posted Date: 16 Dec 2025

SOC Verification Engineer: CLK RST & Power Management

your career. SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: SOC CLK RST & Power Management): Work on SOC..., memory controller etc. Comfortable with design/verification tools and flows like VCS, Verdi, SOC Connectivity, SV assertions...

Posted Date: 12 Dec 2025

Senior IP DV Engineer - NOC IP

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation... of memory subsystem units for the world’s leading GPUs and SOCs. This position offers the opportunity to have real impact...

Company: Nvidia
Posted Date: 12 Dec 2025

SOC Verification Engineer: Security DV

your career. SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: Security DV ): Work on SOC level..., Memory protection, Config protection, Encryption/Decryption, Booting, SHA, AES, RSA) Expertise in IP, Subsystem and SOC...

Posted Date: 10 Dec 2025

SOC Verification Engineer: SOC DDR, UMC

your career. MTS SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: SOC DDR, UMC): Work on SOC level verification... delivery, work with design (IP, Subsystem, SOC) for RTL and TB collaterals and resolve issues. He should have good...

Posted Date: 10 Dec 2025

Lead Firmware Engineer (Power management or Security)

management, security , networking and platform memory setup firmware Plan, track and deliver all firmware deliverables. Design... documents. Design, develop, test, review features / releases pertaining to Power Management, Security and Memory. Provide low...

Posted Date: 07 Dec 2025

CPU Performance & Power Analyst - Principal Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... and performance team. Responsible for analyzing the performance aspects of Snapdragon CPU subsystem and influence the same...

Company: Qualcomm
Posted Date: 06 Dec 2025

LEAD PLATFORM EMULATION ENGINEER

, GPU, and Memory subsystem Proficient in debugging firmware and RTL code using simulation tools Good understanding... your career. LEAD PLATFORM EMULATION ENGINEER: THE ROLE: The focus of this role is to plan, build, execute the verification...

Posted Date: 27 Nov 2025

PLATFORM EMULATION ENGINEER

your career. MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, execute the verification..., GPU, and Memory subsystem Proficient in debugging firmware and RTL code using simulation tools Good understanding...

Posted Date: 27 Nov 2025

PLATFORM EMULATIION ENGINEER

, GPU, and Memory subsystem Proficient in debugging firmware and RTL code using simulation tools Good understanding... your career. PLATFORM EMULATIION ENGINEER: THE ROLE: We are looking for an adaptive, self-motivative platform emulation...

Posted Date: 27 Nov 2025

Senior Silicon Engineer

Define and execute block and subsystem-level verification strategy for DPU IPs Develop SystemVerilog UVM testbenches... closely with architecture, RTL design, and post-silicon validation teams Drive improvements in verification methodology...

Company: Microsoft
Posted Date: 10 Dec 2025

Staff Engineer – NSP/NPU System Software

, design, and development of system software to use SoCs extensive heterogeneous computing capabilities to allow running... working on design, development, integrate, commercialize and maintenance of system software for CPU, NSP processors...

Company: Qualcomm
Posted Date: 01 Nov 2025

SOC Verification Lead

your career. SMTS SILICON DESIGN ENGINEER THE ROLE (SOC Verification Lead): Drive and lead the SOC level verification..., DDR, memory controller, ARMSS, X86 etc. Comfortable with design/verification tools and flows like VCS, Verdi, SOC...

Posted Date: 12 Dec 2025

SOC level verification - PCIE, USB, Ethernet

your career. SDE/MTS/SMTS SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: GDP DV ): Work on SOC level... understanding including some of the common IPs like ACE, CHI, AXI, PCIe, DDR, memory controller etc. Comfortable with design...

Posted Date: 28 Nov 2025