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Keywords: Lead IP Design Verification Engineer, Location: Bangalore, Karnataka

Page: 4

Silicon - Performance Analysis Lead/Staff Engineer

. Candidates need to work closely with IP architects and understand the feature design/arch and define the process/methodology... Summary: Job Overview The candidate will be part of the SOC Infrastructure IP Performance modelling and analysis team...

Company: Qualcomm
Posted Date: 29 Nov 2025

NoC (RTL) Design - PE/Director

and implementation of interconnect and related IP's Actively work with SoC team, verification team, physical design team, SoC Floorplan... General Summary: Design Engineer (18+ years of experience) SoC Interconnect for the next generation System-on-chip (SoC...

Company: Qualcomm
Posted Date: 25 Nov 2025

High Speed Memory/IO Circuit Lead (Mixed Signal)

your career. SMTS SILICON DESIGN ENGINEER THE ROLE: Be part of AMD’s analog/mixed signal IP design team responsible for the... design and development of next generation IOs, high speed memory (gDDRx, HBMx) and die-to-die Gbps proprietary PHY IP...

Posted Date: 19 Nov 2025

Sr. Lead Software Development Eng

your career. Sr. LEAD SOFTWARE DEVELOPMENT ENGINEER THE ROLE: We are seeking an engineer to join our team that will thrive... firmware during SOC bring-up. Partner with HW and Silicon validation teams for verification of all features in the Silicon IP...

Posted Date: 14 Nov 2025

DFT (DFX) Lead Engg

your career. SMTS SILICON DESIGN ENGINEER THE ROLE: Circuit Technology team is looking for a passionate and experienced DFT..., and be able to independently drive tasks to completion. Key Responsiblities Lead and define PHY specific Design for Test...

Posted Date: 14 Nov 2025

Technical Lead II - VLSI

contributor take ownership for any one or more task/module of RTL Design/Module Verification/PD/DFT/Circuit Design/Analog Layout... PT/Tempus Calibre etc. (experience with one or more tools) Technical Knowledge:a. Implement IP Spec Architecture Design...

Company: UST
Posted Date: 04 Dec 2025

RTL Lead

Collaboration: Work closely with Micro-architecture, IP Design, Verification, Physical Design, and DFT teams to ensure a clean... Engineer to join our cutting-edge semiconductor design team in Bangalore. The ideal candidate will be responsible for the top...

Company: Quest Global
Posted Date: 13 Nov 2025

Principal Product Engineer

Engineer – Memory IP Products Join a growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY..., HBM3/4, GDDR6/7 or similar IPs Verilog RTL design and gate level verification experience Synthesis and STA experience...

Posted Date: 23 Oct 2025

Software Dev Engineer – C++, Networking

Software Dev Engineer – C++, Networking This role has been designed as ‘’Onsite’ with an expectation... hardware compatibility and/or influences hardware design. Management Level Definition: Contributions include applying...

Posted Date: 13 Dec 2025

DFT Engineer

, embedded firmware, functional verification and RTL design Experience working with test teams for silicon bring up, silicon... quicker on the most trusted hardware platform in today's market. We are looking for a DFT lead to join our dynamic team...

Company: IBM
Posted Date: 12 Dec 2025

Staff Synthesis & STA Engineer

About the Role As a Staff Synthesis & STA Engineer, you will own lead & own Synthesis & STA for complex high performance ICs..., ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Staff Synthesis & STA Engineer...

Posted Date: 12 Dec 2025

Technologist Engineer, ASIC Development Engineering (Validation)

with design, verification, firmware, and product engineering teams to reproduce and resolve system-level issues. Proficiency.... Job Description The SoC Development team is seeking a highly motivated Technologist SoC Validation Engineer to join a team of experienced...

Company: SanDisk
Posted Date: 10 Dec 2025

Senior DFT Engineer, SSG

. Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning... leadership in taking chips from design to volume production. As a Senior DFT Engineer, you will be both the technical owner...

Company: Amazon
Posted Date: 25 Oct 2025

Sr Software Quality Engineer I

across our global community. The Role We are looking for a Senior Software Quality Engineer to create and execute testing approaches... while collaborating with R&D and Product Management. Your Impact Design, build, execute, and maintain test automation including...

Posted Date: 28 Sep 2025

Sr Software Quality Engineer I

across our global community. The Role We are looking for a Senior Software Quality Engineer to create and execute testing approaches... while collaborating with R&D and Product Management. Your Impact Design, build, execute, and maintain test automation including...

Posted Date: 28 Sep 2025

Principal Engineer - SOC Clocking

with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...Job Details: Job Description: Key Responsibilities: Lead the architecture, design, and integration of SoC-wide...

Company: Intel
Posted Date: 10 Dec 2025

AIO Small Cell NLT - Senior Test Engineer

Job Category: Applied R&D Degree Level: Bachelor's degree Job Description: Lead validation of Small Cells...-level designs to ensure comprehensive test planning and validation coverage. You will design and execute testing strategies...

Company: Nokia
Posted Date: 26 Nov 2025

Principal Manufacturing Software Engineer

In this role, you will have the opportunity to: Design and implement manufacturing software platforms for instrument... production workflows including test sequencing, calibration, firmware flashing, and final system verification using Python, C...

Company: Danaher
Posted Date: 23 Nov 2025

Staff/ Senior Staff DFT Engineer

, hierarchical flows, SSN/IJTAG). Lead cross‑functional collaboration with RTL, synthesis, physical design, verification... development, EDA/methodology development and IP/Chip design development. India DFT team is a key part of Global DFT community...

Company: Marvell
Posted Date: 22 Nov 2025

Senior Principal Engineer

applications. What You Can Expect Lead the DV execution and sign-off for the entire IP, Subsystem and SoC Define and drive... creation, testbench architecture, and milestone reviews Work closely with Design and DV teams across IP, Subsystem, and SoC...

Company: Marvell
Posted Date: 22 Nov 2025