Job Title: STA Methodology Engineer Team: CTO-DE-FDIP-Logic Libraries Location: Bengaluru Experience Level: 10–12 Years Employment Type: Full-Time Role Overview: We are seeking a highly skilled and experienced STA Methodology Engin...
Job Description Bachelor’s or Master’s degree in Electrical or Electronics Engineering 7-12 years of hands-on experience in Physical Design Implementation activities in latest technology nodes (5nm or lower) Lead the end-to-end physical...
Senior DFT engineer with 10+ yrs experience in SoC DfT implementation and verification of scan architectures, JTAG, memory BIST, ATPG, LBIST. BE/ME/B.Tech/M.Tech from reputed institutes with 1st class degree and minimum of 5yrs of relevant...
Job responsibilities: Implement scan insertion, ATPG pattern generation, Memory and logic bist implementation Perform DFT simulations and analyze results to ensure test coverage and quality. Debug and resolve DFT-related issues througho...
Job Responsibility: Drive architecture definition in conjunction with the Systems Architects, and working with the cross function Design, Verification, Validation and supporting SW/FW teams. Own the complete design of one or more cutting...
Summary: The Digital Verification Engineer / Architect is responsible for defining Design Verification strategy, plan and implement it for a IP, sub-system or IC level. Looking for a senior engineer with 12+ years of experience in Verific...