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Keywords: Physical Synthesis Implementation Engineer, Location: San Diego, CA

Page: 1

Timing & Synthesis Engineer

ownership throughout the entire project cycle (RTL, synthesis, and physical implementation). Execute low power physical... areas, and thrive during critical times. Description As a Timing Engineer, you will work in a team developing Wireless...

Company: Apple
Location: San Diego, CA
Posted Date: 02 Oct 2025

HW SOC/ASIC Physical Design Engineer, Senior (US Citizenship Required)

** We are seeking a highly skilled and motivated Physical Design Engineer to join our team. The ideal candidate will have hands..., validate, and maintain timing constraints (SDC) for multiple modes and corners. Collaborate with RTL, synthesis, and physical...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 19 Oct 2025
Salary: $115600 - 173400 per year

HW SOC/ASIC Physical Design Engineer, Staff/Sr Staff (US Citizenship Required)

** We are seeking a highly skilled and motivated Physical Design Engineer to join our team. The ideal candidate will have hands... constraints (SDC) for multiple modes and corners. Collaborate with RTL, synthesis, and physical design teams to ensure timing...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 19 Oct 2025

Electrical Engineer 4

Join our fast-paced and passionate team as an Electrical Engineer 4. As we scale, you will be instrumental in building... and in a team while over communicating with the manager, project engineer and the teammates. Will mentor junior engineers. Execute...

Company: Monarch Quantum
Location: San Diego, CA
Posted Date: 24 Dec 2025

Electrical Engineer 3

Join our fast-paced and passionate team as an Electrical Engineer 3. As we scale, you will be instrumental in building... and in a team while over communicating with the manager, project engineer and the teammates. Will mentor junior engineers. Execute...

Company: Monarch Quantum
Location: San Diego, CA
Posted Date: 24 Dec 2025
Salary: $125000 - 175000 per year

Graphics (GPU) Hardware Project Engineer

of ASIC design flow (Arch, uArch, RTL, model, verification, synthesis, physical design) in leading technology nodes Depth... the best GPUs possible, for all markets. Role The Project Engineer (PE) is the overall technical lead for a core...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 18 Dec 2025

Camera DV Engineer (Multiple Location_ San Diego and Santa Clara)

. Good understanding of VLSI design flows, including RTL design, synthesis, verification, and physical implementation... next-generation experiences that shape a smarter, more connected future. As a Camera Engineer at Qualcomm, you will work at the...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 12 Dec 2025

Camera Design Engineer

with synthesis and physical design teams TCL/Perl/Python/shell-scripting skills a major plus Minimum Qualifications: • Bachelor... Summary: The Multimedia Camera HW team is looking for strong ASIC design engineer for an exciting opportunity to be involved...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 12 Dec 2025
Salary: $122500 - 183700 per year

Sr. Verification Engineer - Mixed-Signal ICs

. Integrated Circuit (IC) Verification Engineer is responsible for developing and implementing verification plans for a variety... of mixed-signal integrated circuit blocks and systems. The Sr. Integrated Circuit (IC) Verification Engineer will closely...

Company: Semtech
Location: San Diego, CA
Posted Date: 02 Oct 2025
Salary: $130000 - 183206 per year

CAD and PPA Methodology Engineer

design flow from RTL to GDS such as synthesis, static timing analysis, formal verification, physical design, ECO generation... microarchitecture design and implementation teams. The successful candidate will possess basic understanding of RTL design and ASIC...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 18 Nov 2025

Custom IP Design Engineer

the IP specification definition, RTL design, architecture and circuit design, physical implementation, verification... with synthesis, physical design flows (Genus, Innovus or FusionCompiler) and STA timing closure (PrimeTime or Tempus). Knowledge...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 01 Nov 2025
Salary: $115600 - 173400 per year

Wireless SoC Design Engineer

design flow, including System Verilog RTL implementation, Lint, CDC, RDC, Synthesis and STA. Preferred Qualifications... bring-up. Work closely with physical design, DFT, and CAD teams to optimize performance, power, and area (PPA) targets...

Company: Apple
Location: San Diego, CA
Posted Date: 31 Oct 2025

FE Design and Timing Engineer

to Post Synthesis netlist. Exposure to industry standard Timing, Logic Equivalence, Physical Design and Synthesis tools..., with CAD to understand and develop flows, with UPF and DFT teams to insert power and test structures, and with Physical design...

Company: Apple
Location: San Diego, CA
Posted Date: 25 Oct 2025

FE Design and Timing Engineer

to Post Synthesis netlist. Exposure to industry standard Timing, Logic Equivalence, Physical Design and Synthesis tools..., with CAD to understand and develop flows, with UPF and DFT teams to insert power and test structures, and with Physical design...

Company: Apple
Location: San Diego, CA
Posted Date: 25 Oct 2025