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Keywords: Power Optimization , Location: Santa Clara, CA

Page: 2

Sr Principal Engineer Software (ATP Cloud Service)

, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full time... development and optimization of backend services, with a keen eye for scalability, reliability, and performance. The ideal...

Location: Santa Clara, CA
Posted Date: 16 Oct 2025

Sr Principal Engineer Software (ATP Cloud Service)

, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full time... development and optimization of backend services, with a keen eye for scalability, reliability, and performance. The ideal...

Location: Santa Clara, CA
Posted Date: 16 Oct 2025

Senior Video ASIC Design Engineer

, functional coverage definition, synthesis, power, timing, and area optimization, static checks, and support of physical design...’s. What you will be doing: Develop ASIC designs for Video IP, including micro-architecture, design coding, performance optimization...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 16 Oct 2025

Solutions Architect, Oracle

's Oracle solutions-from concept to execution and sustaining. Leveraging the power of Pure's market leading data storage..., influencers and decision makers. Performance Optimization: In Depth knowledge of the I/O protocols, pathways and tuning practices...

Company: Pure Storage
Location: Santa Clara, CA
Posted Date: 16 Oct 2025

AIML - Sr Machine Learning Engineer - Answers, Knowledge & Information

. We are part of a wider effort to power information across a variety of Apple products - including Siri, Spotlight, Safari... for training and deploying these models at scale, using the latest advances for online inference optimization...

Company: Apple
Location: Santa Clara, CA
Posted Date: 16 Oct 2025

Hardware Validation Engineer

We Are: Born digital, UST transforms lives through the power of technology. We walk alongside our clients and partners, embedding..., SMBUS, PCIe, USB, and power control loops · Drive validation across product lifecycle stages—from initial bring-up...

Company: UST
Location: Santa Clara, CA
Posted Date: 16 Oct 2025
Salary: $70000 - 105000 per year

RISCV CPU Systems Architecture/RTL Engineer – Senior Level

, you will own or contribute to the following: Explore performance and power optimization opportunities in collaboration with the... Summary: We are hiring talented engineers for RISCV CPU RTL development targeting high-performance, low-power devices...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 15 Oct 2025

Sr Staff DevOps Engineer (Cortex)

, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full time... Kubernetes (GKE preferred) and Docker, ensuring resilience and security Monitoring & Performance Optimization – Implement...

Location: Santa Clara, CA
Posted Date: 12 Oct 2025

Senior Optical Transceiver Design Engineer

transceiver modules (1.6T and beyond) aligned with product-level requirements. Design high-speed PCB schematics including power... of optical, electrical, and mechanical systems. Lead technical validation, bring-up, and performance optimization of optical...

Company: Arista Networks
Location: Santa Clara, CA
Posted Date: 12 Oct 2025

Sr Staff DevOps Engineer (Cortex)

, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full time... Kubernetes (GKE preferred) and Docker, ensuring resilience and security Monitoring & Performance Optimization - Implement...

Location: Santa Clara, CA
Posted Date: 12 Oct 2025

Principal, Cloud and Cortex Product Strategy and Operations

, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full time... tissue between product and GTM teams Drive execution and optimization on core product operations related topics...

Location: Santa Clara, CA
Posted Date: 11 Oct 2025

Senior Video AI Architect

. Research/development experience into video compression standards (H.264/HEVC/AV1). Experience with GPU optimization...? Do you love the challenge of crafting the fastest and most power-efficient chips in their class? If so, we want to hear...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Oct 2025

Senior Software Engineer, Aerial - Performance

, debugging and testing skills. Hands-on experience with performance analysis, characterization and optimization. Experience... of signal processing algorithms at the PHY layer or resource allocation optimization at MAC level. CUDA experience highly...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Oct 2025

Principal Digital IC Design Engineer

closure, and power optimization. Own RTL delivery milestones from ASR through PRQ, including support for emulation, silicon...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 10 Oct 2025
Salary: $146850 - 220000 per year

Senior Software Engineer, AI Systems - vLLM and MLPerf

in inference system-level optimization, then translate research ideas into practical, robust systems. Explorations and academic... to create groundbreaking technologies that enable anyone to harness the power of AI and benefit from its potential. Our team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

Account Manager Intern

design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions..., or Computer Science required Lab experience using test equipment such as oscilloscopes, VNA, signal generators, power supplies...

Posted Date: 09 Oct 2025

Account Manager Intern

insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create..., or Computer Science required Lab experience using test equipment such as oscilloscopes, VNA, signal generators, power supplies...

Posted Date: 09 Oct 2025

Design for Manufacturing Technologist

volume manufacturing, focusing on design-process co-optimization to maximize performance, power, and area (PPA) benefits... and implement advanced DTCO methodologies including design rule optimization, process-aware design guidelines, and manufacturing...

Company: Intel
Location: Santa Clara, CA
Posted Date: 09 Oct 2025

Hardware Validation Engineer

digital, UST transforms lives through the power of technology. We walk alongside our clients and partners, embedding..., SMBUS, PCIe, USB, and power control loops · Drive validation across product lifecycle stages—from initial bring-up...

Company: UST
Location: Santa Clara, CA
Posted Date: 09 Oct 2025
Salary: $65000 - 98000 per year

Senior Optical Transceiver Design Engineer

transceiver modules (1.6T and beyond) aligned with product-level requirements. Design high-speed PCB schematics including power... of optical, electrical, and mechanical systems. Lead technical validation, bring-up, and performance optimization of optical...

Company: Arista Networks
Location: Santa Clara, CA
Posted Date: 08 Oct 2025
Salary: $140000 - 198000 per year