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Keywords: Power and Performance Lead-Client Silicon, Location: Folsom, CA

Page: 1

Principal Engineer - Silicon Packaging Architect

Customers in the Client and Hyperscaler Domains. About the Role: Intel’s Central Engineering Group is seeking a Silicon... Packaging Architect, responsible for bridging silicon design and advanced packaging to deliver high-performance, cost-effective...

Company: Intel
Location: Folsom, CA
Posted Date: 16 Nov 2025

High-Speed I/O PHY Architect

in defining the architecture, performance, and power efficiency of our high-speed interfaces, directly impacting the success... future of our client SoC technology. Key Responsibilities Architectural Leadership: Lead the architectural definition...

Company: Intel
Location: Folsom, CA
Posted Date: 02 Nov 2025