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Keywords: Principal ASIC Design Verification Engineer, Location: USA

Page: 3

Sr Principal Engineer Electrical

circuit design, FPGA/ASIC design and verification, and other essential electrical engineering functions. Plan, design... Engineer to join our controls group on the medium-caliber Bushmaster gun team. In this role you will design, test...

Company: Northrop Grumman
Location: Arizona
Posted Date: 18 Nov 2025

Principal Technical IP Engineer - Manage 3rd Party IP Integration - DDR/LPDDR/GDDR/HBM/eMMC memory

, that is predominantly 3rd party IP. What You Can Expect Looking for a talented Principal Technical IP Engineer to join the Marvell Team.... Proficient in project management tasks required to manage 3rd party developers. Broad-based exposure to ASIC design flows...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 16 Nov 2025
Salary: $143200 - 214500 per year

Principal/Sr. Principal Systems Engineer

Integration & Test (SEIT) department is seeking Principal/Sr. Principal Systems Engineer to join our team and develop these.... This position will serve on-site in Linthicum/ Annapolis Junction, MD. This position can be filled as a Principal Systems Engineer...

Company: Northrop Grumman
Location: USA
Posted Date: 05 Nov 2025
Salary: $105400 - 165500 per year

Sr. Principal Digital Integration and Test Engineer

Engineer (T4): Northrop Grumman Electronics and Payloads Engineering is seeking a Senior Principal Digital Integration & Test... of delivering advanced operational capabilities on schedule and under budget. In this position the I&T Engineer will design...

Company: Northrop Grumman
Location: Linthicum, MD
Posted Date: 09 Oct 2025

Principal Electrical Engineer

Principal Electrical Engineer Responsibilities: To take primary technical leadership in the design, management... such as LT-Spice, P-Spice, OrCAD, Allegro and Pantheon. Analog / mixed signal ASIC design and verification using Cadence...

Company: Cypress HCM
Location: Bohemia, NY
Posted Date: 01 Oct 2025

Senior Principal Engineer

-architecture development, RTL design (SystemVerilog/Verilog), and verification using UVM. -- ASIC design flow: floorplanning.... As a High-Speed DSP Design Engineer, you will play a key role in micro-architecting and developing next-generation DSP...

Company: Marvell
Location: Colorado
Posted Date: 11 Dec 2025
Salary: $166500 - 246420 per year

Principal Hardware Engineer, Optics

is responsible for design, verification, and validation of these integrated high speed optical components. The team performs system... in hardware validation and verification, including debugging and troubleshooting Help develop and maintain detailed design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Nov 2025
Salary: $143200 - 214500 per year

Principal Embedded Software Engineer- Boot Firmware

and firmware technology teams, besides product verification, system, architecture, tools and test teams, to instrument the firmware... motivated engineer, a team player who is passionate to learn new technologies and write low level firmware that drives hardware...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 08 Nov 2025

Principal Engineer - Memory-Centric AI Compute Architect

field and 8+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree... in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 21 Nov 2025

High-Speed Analog & Mixed-Signal PHY Design Engineer

and 2+ years of ASIC design, verification, or related work experience. OR Master's degree in Electrical Engineering... or related field and 2+ years of ASIC design, verification, or related work experience. OR PhD in Electrical Engineering...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 05 Dec 2025
Salary: $115600 - 173400 per year

Senior Principal Switch Architect

with ASIC design, SerDes, firmware, validation, systems engineering, and product teams to bring new switch architectures... networks, optical interconnects, and custom silicon. What You Can Expect As a Senior Principal Engineer, you will serve...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Nov 2025

CPU Core RTL Methodology Engineer

, Design Verification, Physical Design, and Post-Silicon Teams to make AMD’s ambitious future CPU roadmap a reality. THE...#, or TypeScript) and familiarity with a second language Exposure to physical design and verification methods Awareness...

Location: Austin, TX
Posted Date: 12 Dec 2025