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Keywords: RTL/IP Design Lead, Location: Bangalore, Karnataka

Page: 3

Fellow Silicon Design Engineer

of innovation. As a Fellow-level Verification Architect, you will define and lead the verification architecture and methodology... for next-generation high-speed interface PHY IP designs (DDR, LPDDR, USB, PCIe, and emerging standards). You will set the strategic...

Posted Date: 14 Jan 2026

Senior Principal Digital IC Design Engineer

) RTL design of digital IP blocks and systems in Verilog/SystemVerilog Experience in technical project/task leadership... is a plus: Design of CPU/MCU (sub)systems, SystemRDL or IP-XACT Programming in Python for automation and in C/C++ for embedded software...

Company: onsemi
Posted Date: 09 Jan 2026

Senior Manager Silicon Design Engineering

a team to develop RTL for SoC subsystems and understand architectural specifications. Responsibilities include IP... and subsystem design, integrating multiple IPs, performing quality checks and working collaboratively with the IP/SoC team. KEY...

Posted Date: 02 Jan 2026

Senior Digital Design

, DSP), AMBA bus protocols (AHB/APB). RTL design of digital IP blocks and systems in Verilog/SystemVerilog Technical... development with the software team Lead project activities Contribute to design methodology and design flow improvements...

Company: onsemi
Posted Date: 25 Dec 2025

Principal Design Verification Engineer

complex, high-performance functions with exceptional efficiency. In this role you will: Lead design verification for complex... development of high-quality designs. The team is responsible for producing advanced, custom IP and SoC designs that achieve...

Company: Microsoft
Posted Date: 14 Dec 2025

Senior Staff Engineer, Physical Design

: Work with design teams across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration..., static timing, physical verification) using industry standard EDA tools. Work with RTL design teams to drive assembly...

Company: Marvell
Posted Date: 13 Dec 2025

Senior Principal Engineer, Physical Design

design capabilities and infrastructure in alignment with company-wide technology strategy. Lead RTL-to-GDSII implementation... in major foundries. Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure. In-depth...

Company: Marvell
Posted Date: 13 Dec 2025

Senior Engineer, Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise... infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the...

Company: Marvell
Posted Date: 13 Dec 2025

Principal Physical Design Engineer

Digital Physical Design Engineer Role Overview A Principal Digital Physical Design Engineer will own and execute the... implementation tasks over management responsibilities. Key Responsibilities Lead and perform all major steps of the digital...

Posted Date: 21 Nov 2025

Growth Analyst/Specialist - Interior Design (1-5 yrs) Bangalore/Hyderabad,Telangana,Ind (B2B/Corporate Sales)

services.Key Responsibilities:- Identify and research potential clients in semiconductor, fabless design, and IP services... generation, or sales (B2B tech preferred).- Basic understanding of semiconductor terminology (ASIC, SoC, RTL, IP...

Posted Date: 31 Oct 2025

Lead Product Engineer

. Position Requirements Experience working with UCIe, PCIe, Ethernet, 112G or similar interface IP. Verilog RTL design.... Job Title: Lead Product Engineer Location: Bangalore About Us Cadence is a pivotal leader in electronic design, building...

Posted Date: 14 Jan 2026

Lead FW/SW Validation

Job Description: Lead FW/SW Validation Position Overview We are seeking a motivated Firmware Developer..., including hardware design engineers, architects and software developers, to ensure that our firmware meets performance...

Posted Date: 30 Dec 2025

DV Lead Engineer

Subsystem/SOC Design Verification for an ARM based SoC Design. Extensive experience in SV/UVM based SOC or IP Verification... & Debug simulation failures across IP, interconnects , Subsystem & Top level, and work with RTL team for resolution. Define...

Company: Quest Global
Posted Date: 20 Dec 2025

PHY Digital Lead

, Security, and Networking. What You Can Expect As a Principal Design Engineer, you will lead micro-architecture and RTL..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Principal...

Company: Marvell
Posted Date: 19 Dec 2025

Lead Verification Engineer

of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON... your career. Lead Verification Engineer THE ROLE: The focus of this role is to plan, build, and execute the verification...

Posted Date: 18 Dec 2025

Full Chip Timing /Constraints Lead

your career. SMTS Silicon Design Engineer (Full Chip Timing /Constraints Lead) THE ROLE: As a member of the Strategic... Silicon Solutions Group Physical design team, you will help bring to life cutting-edge designs. As a member and lead of the...

Posted Date: 11 Dec 2025

VLSI Lead L1

and implementation for a client ͏ Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify... Jobs Job Description Apply now Start Please wait... Job Title: VLSI Lead L1 City: Bengaluru State/Province: Karnataka Posting Start Date: 12/8/25...

Company: Wipro
Posted Date: 09 Dec 2025

VLSI Lead L1

and implementation for a client ͏ Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify... Jobs Job Description Apply now Start Please wait... Job Title: VLSI Lead L1 City: Bengaluru State/Province: Karnataka Posting Start Date: 12/8/25...

Company: Wipro
Posted Date: 09 Dec 2025

Technical Lead I - VLSI

– 2 3. Designation/ band – Technical Lead I – VLSI – B1 4. Mandatory Skill – RTL Design Lead 5. Location – Bangalore JD... Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL...

Company: UST
Posted Date: 04 Dec 2025

LEAD PLATFORM EMULATION ENGINEER

cause; work with RTL and firmware engineers to resolve design defects and correct any test or infra issues Responsible... your career. LEAD PLATFORM EMULATION ENGINEER: THE ROLE: The focus of this role is to plan, build, execute the verification...

Posted Date: 27 Nov 2025