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Keywords: RTL Design , Location: Bangalore, Karnataka

Page: 7

Physical Design Low Power Lead

and work with RTL design teams to enhance overall power efficiency by improving clock gate efficiency, datapath power, using... your career. MTS/SMTS SILICON DESIGN ENGINEER THE ROLE: As a low power lead in AMD India cores team, you will work to verify...

Posted Date: 14 Jan 2026

Fellow Silicon Design Engineer

: Establish flows that integrate firmware/driver components with RTL to validate initialization, calibration, training sequences...; harmonize processes, reviews, and sign-off standards. Partner with design/architecture/validation to align requirements...

Posted Date: 14 Jan 2026

FPGA Design Engineer

of RTL design, synthesis, timing closure, simulation and verification test benches. Hardware bring up and debug experience... communication systems. In this role you will be required to: All aspects of FPGA design activity: Coding, Synthesizing, mapping...

Company: Ceragon
Posted Date: 11 Jan 2026

Experienced Engineer - ASIC Design

of ASIC technology, design environments, and methodologies. SystemVerilog RTL static sign-off tools such as SpyGlass...Bachelor's degree in electrical or computer engineering. 5+ years industry experience in ASIC IP Design. Understanding...

Company: Ericsson
Posted Date: 09 Jan 2026

Senior Engineer - ASIC Design

Bachelor's degree in electrical or computer engineering. 10+ years industry experience in ASIC IP Design Understanding... of ASIC technology, design environments, and methodologies. IP development from concept (High-level Spec) to Micro...

Company: Ericsson
Posted Date: 09 Jan 2026

IP/Subsystems Design Verification Lead

Preferred Experience: 12-15 years full-time experience in RTL design verification Proficiency in system verilog and UVM... your career. PMTS SILICON DESIGN VERIFICATION ENGINEER THE ROLE: As a member of the Computing and Graphics group...

Posted Date: 09 Jan 2026

Staff Digital IC Design Engineer

will participate in digital system architecture, block- and system-level RTL design/coding, algorithm and firmware development, digital... of digital IC circuit design in an HDL synthesis environment Ability to develop RTL code and understand how RTL will map to gate...

Company: Skyworks
Posted Date: 09 Jan 2026

Physical Design Lead

with RTL design, STA, DFT, CAD, and packaging teams to converge on implementation-friendly architectures and constraints... Physical Design Engineer is role which combines deep hands-on implementation expertise with technical leadership. This role...

Posted Date: 09 Jan 2026

Senior Engineer, Digital Design

engineering 5 years of experience in Logic design /micro-architecture / RTL coding. Must have hands on experience with Power.... Job Description Principal Accountabilities: (the 6-8 main areas of responsibility) Design of optimized digital blocks meeting functional, cost...

Posted Date: 08 Jan 2026

Senior Engineer, Digital Design

/ RTL coding. Must have hands on experience with Power product design, synthesis and timing analysis for complex Analog...Job Description Principal Accountabilities: (the 6-8 main areas of responsibility) Design of optimized digital...

Posted Date: 07 Jan 2026

Senior Design Engineer - Memory Subsystem

, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers... be doing: Own micro-architecture and RTL development of design modules. Micro-architect features to meet performance, power...

Company: Nvidia
Posted Date: 07 Jan 2026

Design Verification Methodology/CAD Engineer

such as stimulus, checkers, assertions, trackers, and coverage. Works with design verification engineers to create and enhance... environments. 6. Strong CPU/GPU architecture understanding. 7. RTL Debugging module level or soc level system simulation failures...

Company: Intel
Posted Date: 07 Jan 2026

Senior Design Verification Engineer – SerDes IP

your career. THE ROLE We are looking for a Senior Design Verification Engineer to join our SerDes IP team focused on high..., design, circuit/modeling, and validation teams to ensure correctness, coverage, and high confidence across PVT, jitter/noise...

Posted Date: 07 Jan 2026

DDRPHY Senior Staff/Staff/ Lead Digital Design Engineer

Design Responsibilities Front-End implementation of high speed DDRPHY design RTL development and its validation... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 07 Jan 2026

Physical design Engineer

strong technical leadership, working closely with cross-functional teams including RTL design, Physical Design (PD), Static Timing... About the Role Looking for a experienced Full Chip Lead to own and drive the entire physical design flow for SoCs. This role...

Company: Quest Global
Posted Date: 06 Jan 2026

Silicon Design Engineer

. Low power physical design implementation flows ranging from RTL design through synthesis, place and route, timing closure... your career. MTS SILICON DESIGN ENGINEER THE ROLE: As a member of the PD Full Chip STA closure and optimization team...

Posted Date: 04 Jan 2026

Senior Manager Silicon Design Engineering

Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs Verilog lint tools (Spyglass... your career. SENIOR MANAGER SILICON DESIGN ENGINEER THE ROLE: AMD seeks a passionate, collaborative leader...

Posted Date: 02 Jan 2026

Physical Design Lead

your career. THE ROLE: The position will involve working with a very experienced physical design team and is responsible... for delivering the physical design of blocks/tiles to meet challenging goals for frequency, power and other design requirements...

Posted Date: 30 Dec 2025

Senior Digital Design

, DSP), AMBA bus protocols (AHB/APB). RTL design of digital IP blocks and systems in Verilog/SystemVerilog Technical... Design intent (timing constraints/SDC, power intent/UPF) Design of signal processing components RTL to GDS flow, including...

Company: onsemi
Posted Date: 24 Dec 2025

Senior ASIC Design Engineer - XBAR IP

and debug. What we need to see: BS / MS or equivalent experience. 5+ years of design experience. Experience in RTL... or equivalent simulation tools, debug tools like Debussy, GDB). Deep understanding of ASIC design flow including RTL design...

Company: Nvidia
Posted Date: 24 Dec 2025