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Keywords: RTL Design Engineer, Location: Santa Clara, CA

Page: 4

Senior DFT Engineer

DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation... breakthrough Test Architectures for reticle sized, multi-chiplet products—from RTL to verification to post-silicon ATE bring-up...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 18 Jun 2025

Integration Engineer

engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design... design and RTL development (SystemVerilog, Verilog). Familiarity with SoC design flows and tools (e.g., Synopsys, Cadence...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Jun 2025

CPU Gate Level Synthesis Engineer

/gate-depth issues and collaborating with the RTL & physical design teams in exploring solutions • Early stage power... design, RTL synthesis, and physical design Preferred Qualifications The ideal candidate should possess CPU...

Company: Apple
Location: Santa Clara, CA
Posted Date: 07 Jun 2025

Software Engineer, Hardware Tools and Methodology Development

for design-for-test, safety/resiliency, and power-saving logic. Act as a "DevOps" engineer for RTL automation by developing new... across NVIDIA. Take ownership of tools that generate common design blocks used in all products, such as auxiliary RTL logic...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 31 May 2025

Senior Async and IO Timing Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise... methodologies across design hierarchies and technology nodes. We're looking for someone passionate about the challenges of designing...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

ASIC Verification Engineer - New College Grad 2025

NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world’s leading GPUs. In this role... will be working across many NVIDIA teams from software, to architecture, design, methodology, and more. The GPU is used...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025
Salary: $96000 - 184000 per year

Senior VLSI CAD Engineer - ECO Tools

. Previous experience as a physical design engineer would be ideal. Proficiency in C++ Some familiarity with use of SAT... product lines many thousands of times per day. We are seeking a CAD R&D Engineer excited to innovate in algorithms related...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

Senior Timing and Constraints Methodology Engineer

). Collaborate with RTL, physical design, and verification teams to drive consistency and correctness across design stages... engineer to develop pioneering timing sign-off strategies for next-generation GPUs and SoCs. In this role, you’ll develop...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

DV CAD Engineer

Engineering General Summary: As a CAD Engineer focusing on the methodology and support of RTL design verification..., you will work with architecture, design, software and verification leads to develop technology critical to the development...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 19 May 2025

Verification Engineer - Specialized (US)

with RTL designers and optimize coverage metrics. Analyze and report on code/functional coverage to ensure design robustness... for complex IP blocks. Design and run directed/randomized tests to validate functionality and performance. Debug failures...

Posted Date: 06 Aug 2025

Senior ASIC Engineer, Static Timing Analysis

/Design Compiler Automate flows using Tcl scripting to improve efficiency in constraint validation Analyze and fix RTL...Develop and validate complex multi-mode/multi-corner timing constraints (SDC) for RTL and signoff Perform pre-route...

Posted Date: 18 Jul 2025

Senior Software Engineer, Hardware Tools and Methodology Development

is looking for a dedicated and motivated Software developer with particular interest in algorithms and RTL Design. Understanding both Software... understanding of ASIC Design and understanding of Verilog RTL Strong interpersonal and collaboration skills. Ways to stand out...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 12 Jul 2025

Principle DSP Engineer

is a plus Experience in working with ASIC design team to guide RTL implementation, verification and validation is a plus Other Skills... and Enterprise. What You Can Expect Design and simulate DSP architectures, define key capabilities, performance requirements...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 11 Jul 2025
Salary: $154240 - 231000 per year

Senior FPGA Prototyping Engineer - Hardware

prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route. Improve... performance of the prototype, analyze timing and generate bit streams. Bring up the design on FPGA prototyping platforms...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 12 Jun 2025

GPU Power Architect/Microarchitect - MTS

opportunities, estimate ROI, and establish plan of record. Drive the Architecture, uArchitectural optimization RTL design fixes... development of Silicon - Architectural, uArch and RTL design. Proven hands-on experience and engineering leadership in GPU or CPU...

Posted Date: 19 Jul 2025

FVCTO - Formal Verification Architect

on world class design IPs and SOCs for Server, Client and Graphics. Use the hardware architecture design and RTL... and AI platforms. IP design group within DCAI designs Coherent Fabric IP, Memory controller, NOC, PCIE and many fundamental building...

Company: Intel
Location: Santa Clara, CA
Posted Date: 12 Jul 2025

Fellow - Power Efficiency Architect

_ THE ROLE: We are looking for a Fellow-level Engineer to join our team to develop world-class products around discrete..., console and mobile GPUs, APUs and SOCs. In this role you will be engaged with architects, micro architecture, RTL, CAD...

Posted Date: 04 Jul 2025