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Keywords: RTL Design Engineer (Coherent Interconnect), Location: Austin, TX

Page: 1

SoC Power Architect (Principal Engineer)

with coherent interconnect, memory controller, and last level cache (LLC) design specifications—evaluating implementation choices... of design abstraction, from RTL to gate level, leveraging industry-standard tools and methodologies. You engage closely...

Company: Samsung
Location: Austin, TX
Posted Date: 22 Oct 2025