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Keywords: RTL Design Lead - IP Design, Location: Bangalore, Karnataka

Page: 4

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 03 Aug 2025

Associate II - VLSI

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 03 Aug 2025

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 03 Aug 2025

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 03 Aug 2025

Principal Engineer - SOC Clocking

with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...Job Details: Job Description: Key Responsibilities: Lead the architecture, design, and integration of SoC-wide...

Company: Intel
Posted Date: 03 Aug 2025

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 03 Aug 2025

Associate II - VLSI

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 02 Aug 2025

Staff DFT Engineer

. Collaborating with RTL Design, Physical Design teams and ASIC vendors to ensure proper test implementation for automotive grade SoC... autonomous devices like vehicles and robots to make more intelligent and safe decisions. Role Overview As a DFT Lead...

Company: Aeva
Posted Date: 31 Jul 2025

Senior Account Manager - Semicon Industry

, including spec definition, RTL, physical design, verification, DFT, and tape-out support. Role Responsibilities: Own the... to lead and grow semiconductor business engagements across India. This role is based out of Hyderabad or Bangalore...

Company: Cyient
Posted Date: 30 Jul 2025

Associate I - VLSI

of VLSI Frontend Backend or Analog design Outcomes: * Works as an individual contributor and on any one task of RTL Design... Knowledge Examples: Basic understanding in any of the design by executing any one of – RTL Design / Verification / DFT...

Company: UST
Posted Date: 18 Jul 2025

Associate III - VLSI PD

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 18 Jul 2025

Verification Engineer (SV, UVM, Networking)

technology. We develop the architecture, collaborate on IP development, create the physical design, develop switching solutions.... Knowledge in C++ programming . Design/RTL experience in Verilog or SV is an advantage. Knowledge of Ethernet protocols (IEEE...

Company: Marvell
Posted Date: 27 Jun 2025

Associate III - VLSI STA

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 24 Jun 2025

Staff DFT Engineer

provides technology development, EDA/methodology development and IP/Chip design development. India DFT team is a key part..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Central Engineering (CCDS) - ASIC...

Company: Marvell
Posted Date: 13 Jun 2025

Staff GPU Verification Engineer

methodology Have the opportunity to lead, coach and mentor other members of the team Participate in design and verification... demands and improvements for graphics, AI or connectivity processor and related IP. You will: Be responsible for the...

Posted Date: 07 Jun 2025

Principal GPU Verification Engineer

verification methodologies. Lead, mentor, and support team members in verification activities. Engage in design and verification... demands and improvements for graphics IP. You will: Oversee all verification activities for a GPU component or subsystem...

Posted Date: 04 Jun 2025