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Keywords: SoC Physical Design Verification Engineer, Location: Beaverton, OR

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SoC Physical Design Verification Engineer

of a critical team responsible for physical verification of an SOC. Description - As a member of our physical design team..., you will perform various types of physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield...

Company: Apple
Location: Beaverton, OR
Posted Date: 06 Jun 2025

SoC Physical Design Verification Engineer

of a critical team responsible for physical verification of an SOC. Description - As a member of our physical design team..., you will perform various types of physical verification checks such as LVS, DRC, design-for-manufacturing & design-for-yield...

Company: Apple
Location: Beaverton, OR
Posted Date: 05 Jun 2025

Physical Design Methodology CAD Engineer

and productivity including ML based solutions. - Collaborating with other disciplines such as physical design verification, RC... products! Description - Participating and leading cross functional teams to solve key physical design challenges...

Company: Apple
Location: Beaverton, OR
Posted Date: 08 May 2025

DDR Mixed Signal Circuit Design Engineer

-Signal Circuit Design Engineer, you will be involved with all phases of high-performance PHY designs from architectural..., etc. Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able to collaborate with logic design team. Solid...

Company: Apple
Location: Beaverton, OR
Posted Date: 28 Jun 2025

CPU Debug and Power Management Microarchitect/RTL Engineer

and correlation - explore high performance strategies and work with the performance verification team to verify that the RTL design... meets targeted performance • Design delivery - Aid in debug of issues at SoC level related to CPU power management, clock...

Company: Apple
Location: Beaverton, OR
Posted Date: 21 May 2025

CPU Debug and Power Management Microarchitect/RTL Engineer

and correlation - explore high performance strategies and work with the performance verification team to verify that the RTL design... meets targeted performance • Design delivery - Aid in debug of issues at SoC level related to CPU power management, clock...

Company: Apple
Location: Beaverton, OR
Posted Date: 17 May 2025