(A must) Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency... timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools...
and Security, in the technology nodes across 3nm/5nm/7nm and more. What You Can Expect As a Senior Staff full chip STA engineer... SOC is highly desired. Understanding of several timing-related concepts is required: setup, hold, clocking, timing...
, and verification at SoC level Interface with cross-functional teams including Logic Design, Physical Design, STA, and ATE for seamless..., DFX Architecture, DFX IP's and all aspects of SoC MBIST and ATPG definition, implementation, validation pre and post...