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Keywords: Staff Engineer, ASIC Development Engineering (SOC, RTL Design, Lint), Location: Bangalore, Karnataka

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RTL Design Engineer (DDR/Staff)

-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA Good understanding... on experience in Low power SoC design is required. Responsibilities Mirco architecture & RTL development and its validation...

Company: Qualcomm
Posted Date: 28 Nov 2025

Staff/Principal Engineer – ASIC Digital Design

Design and develop RTL in Central Engineering team for products which includes blocks such as wakeup sequencing... of digital logic design, IP/SoC architecture and microarchitecture Experience Working knowledge of Synthesis, STA, Lint & CDC...

Company: Micron
Posted Date: 05 Dec 2025

Staff Engineer, DFT Engineering

understanding of digital design fundamentals, including RTL design, Lint/CDC, low power checks, and the full ASIC design flow..., ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . We are seeking a SoC DFT Lead...

Posted Date: 04 Dec 2025