Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: Synopsys, Location: USA

Page: 5

Applications Engineering, Sr Staff Engineer- RTL-to-GDS/Fusion Compiler

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Company: Synopsys
Location: Sunnyvale, CA
Posted Date: 29 Jan 2026

Senior Physical Design Engineer

strong power user of P&R, Timing Analysis, Physical Verification, IR Drop Analysis, CAD tools from Synopsys (ICC2/DC/PT/STAR/ICV...

Company: Nvidia
Location: Westford, MA
Posted Date: 01 Feb 2026

Physical Design Engineer

from Synopsys (ICC2/DC/PT/STAR/ICV), Cadence (Genus/Innovus/Tempus) and other major EDA companies. Confirmed prior experience...

Company: Nvidia
Location: Westford, MA
Posted Date: 01 Feb 2026
Salary: $116000 - 189750 per year

FPGA Design Verification Engineer

, Synopsys VCS, Haps). · Experience with high-speed I/O design and protocols. Knowledge of PCIe, I2C, SPI, etc. · Hands...

Company: UST
Location: Mountain View, CA
Posted Date: 01 Feb 2026
Salary: $101000 - 152000 per year

Senior Engineer, GPU Performance Architect (PPA)

like Synopsys Verdi, functional debug, and performance verification against required specifications. You proactively seek cross... (System Verilog/Verilog). Familiarity with waveform level debugging tools (e.g., Synopsys Verdi) and RTL debugging. Solid...

Company: Samsung
Location: San Jose, CA
Posted Date: 31 Jan 2026

Sr Technical Architect - Physical Design

, STA, PNR, Signoff domain. Eg. Synopsys Fusion Compiler, ICC2, PrimeTime, ICV, Cadence Innovus/Tempus, Ansys RedHawk...

Company: Quest Global
Posted Date: 31 Jan 2026

FPGA Verification Engineer (Multiple Openings – Onsite & Remote)

for Sunnyvale & Denver roles) Experience with FPGA tools such as Xilinx Vivado, Intel Quartus, Synopsys Synplify Proficiency...

Posted Date: 31 Jan 2026
Salary: $50 - 80 per hour

FPGA Design/Verification Engineer

design and verification tools (Xilinx Vivado, Intel Quartus, Synopsys Synplify). Proficient in SystemVerilog. Experience...

Location: Owego, NY
Posted Date: 31 Jan 2026
Salary: $60 - 80 per hour

Level 4 Maintenance Technician

a fresh opinion, ambition, and to challenge our thinking in our goal to achieve net zero! Job Advert Role Synopsys The...

Company: BP
Location: Baton Rouge, LA
Posted Date: 31 Jan 2026

FPGA Design Engineer – Verification (Hybrid – Owego, NY)

and certification of safety critical avionics hardware. Experience with FPGA design tools (Xilinx Vivado, Intel Quartus, Synopsys...

Location: Owego, NY
Posted Date: 31 Jan 2026
Salary: $70 - 80 per hour

FPGA Verification Engineer - UVM (Hybrid)

. - Experience with FPGA design tools (Xilinx Vivado, Client Quartus, Synopsys Synplify). - Proficient in SystemVerilog...

Company: Nesco Resource
Location: Owego, NY
Posted Date: 31 Jan 2026
Salary: $60 - 80 per hour

Senior Manager Custom ASIC Programs, RTL to GDSII

. Proficiency with Synopsys Design Compiler, timing closure methodologies, and formal verification tools (e.g., Cadence LEC...

Company: Capgemini
Location: Santa Clara, CA
Posted Date: 31 Jan 2026

VDDV Global Technical Specialist - HV Battery Electrical Systems

, analysis and testing of electrical system or components Fluent in Synopsys Saber simulator and MAST Product or equivalent...

Company: General Motors
Location: Warren, MI
Posted Date: 31 Jan 2026

Senior ASIC Design Verification Engineer

definitions Proficiency with Synopsys EDA, including DC-Topo, VCS-MX, PrimeTime, Formality, TetraMAX Proficiency with Mentor EDA...

Posted Date: 31 Jan 2026

Silicon Design Verification Engineer

tools/debug environments like Synopsys VCS, Cadence IES to test block level/full chip SOCs and FPGAs. Strong understanding... tools such as Cadence (IEV), Jasper and Synopsys (VC-Formal, Magellan) is a plus. ACADEMIC CREDENTIALS: Bachelors...

Posted Date: 30 Jan 2026

FPGA Design/Verification Engineer

with FPGA design tools (Xilinx Vivado, Client Quartus, Synopsys Synplify). - Proficient in SystemVerilog - Proficiency...

Company: LanceSoft
Location: Owego, NY
Posted Date: 30 Jan 2026

FPGA Design/Verification Engineer

design and verification tools (Xilinx Vivado, Intel Quartus, Synopsys Synplify). Proficient in SystemVerilog. Experience...

Location: Owego, NY
Posted Date: 29 Jan 2026

FPGA Design/Verification Engineer

with FPGA design tools (Xilinx Vivado, Client Quartus, Synopsys Synplify). - Proficient in SystemVerilog - Proficiency...

Company: LanceSoft
Location: Owego, NY
Posted Date: 29 Jan 2026
Salary: $60 - 80 per hour

Head of Physical Design

engineering velocity Familiarity with leading EDA tools like Cadence Innovus, Synopsys ICC2, and Mentor Calibre Comfort...

Company: Etched
Location: San Jose, CA
Posted Date: 29 Jan 2026
Salary: $20000 - 30000 per year

Senior Physical Design Engineer

or are updated in the design project layer (as appropriate). Skilled in industry-standard EDA tools (Synopsys or Cadence). Mentor junior...

Company: Microsoft
Location: Raleigh, NC
Posted Date: 29 Jan 2026