level Hands-on verification utilizing System Verilog/UVM Architecting/creating RTL testbenches from scratch IP knowledge...IP, ASIC, SoC, or FPGA RTL verification Multiple years (1-5) of work experience debugging RTL at the block and/or top...
You Are Your responsibilities are as follows but not limited to: Builds emulation and FPGA models and solutions from RTL design using synthesis... design team and other validation team (both pre-silicon & post-silicon) for various aspects of core validation. Who...
microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design... etc 3+ years of experience in Design Verification and Validation methodologies with UVM, System Verilog and industry...