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Keywords: AI/ML Design Verification Methodology Lead Engineer, Location: Santa Clara, CA

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AI/ML Design Verification Methodology Lead Engineer

: As a AI/ML Design Verification Methodology Lead, will involve in developing and implementing verification strategies..., and coverage-based verification methodology Experience with C/C++, assembly language. Knowledge of low power design concepts...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

Principal Engineer, Verification

of verification professionals in pre-silicon validation of a highly complex SoC design. What We're Looking For Bachelor’s degree...+ years of experience in design engineering with focus on verification. At least 5 years of direct hands-on verification...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Oct 2025
Salary: $146850 - 220000 per year

Senior Staff Engineer, Verification

monitors and drivers using System Verilog and UVM methodology. Develop verification testplan and write tests using random..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Custom Silicon Engineering (CSE...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Oct 2025
Salary: $124420 - 186400 per year

Senior Circuit Design Engineer

, schematic entry, and layout delivery. Integrate AI/ML techniques directly into the design process and methodology...We are now looking for a Senior Circuit Design Engineer! NVIDIA stands at the intersection of hardware excellence...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Oct 2025