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Keywords: ASIC/RTL Design Engineer - Senior (US), Location: San Jose, CA

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ASIC/RTL Design Engineer - Senior (US)

; - Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification... of leading edge SoCs in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC...

Company: Managed Staffing
Location: San Jose, CA
Posted Date: 26 Sep 2025

ASIC/RTL Design Engineer - Senior (US)

; - Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification... of leading edge SoCs in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute in all aspects of SoC...

Company: Managed Staffing
Location: San Jose, CA
Posted Date: 25 Sep 2025

ASIC RTL Design Technical Lead

RESPONSIBILITIES: As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: Write microarchitecture... your career. THE ROLE: A senior technical contributor that drives end-to-end delivery of SerDes solution directly contributing...

Posted Date: 08 Oct 2025

Senior DFx/RTL Engineer

Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design...-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 22 Jul 2025

Senior Applications Engineer – DDR Design IP

Experience on memory subsystem verification and/or performance analysis Strong knowledge of ASIC flow, RTL design in Verilog... Applications Engineer – DDR Design IP Job Location: San Jose, CA Job Description The Cadence IP team develops industry leading...

Posted Date: 11 Oct 2025
Salary: $84000 - 156000 per year

Senior Applications Engineer – DDR Design IP

Experience on memory subsystem verification and/or performance analysis Strong knowledge of ASIC flow, RTL design in Verilog... Applications Engineer – DDR Design IP Job Location: San Jose, CA Job Description The Cadence IP team develops industry leading...

Posted Date: 05 Oct 2025
Salary: $84000 - 156000 per year

Sr Design Verification Engineer ( Remote)

We’re looking for a Senior Digital Design Engineer to lead the development of advanced ASIC/SoC architecture. In this role... engineers. Skills: Bachelor’s/Master’s in EE/CS or similar Min 10+ years of ASIC/SoC design experience Strong RTL design...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 21 Sep 2025
Salary: $140000 - 160000 per year

Sr Design Verification Engineer ( Remote)

We're looking for a Senior Digital Design Engineer to lead the development of advanced ASIC/SoC architecture. In this role... engineers. Skills: Bachelor's/Master's in EE/CS or similar Min 10+ years of ASIC/SoC design experience Strong RTL design...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 20 Sep 2025
Salary: $140000 - 160000 per year

STA Engineer

) Strong understanding of ASIC design flows, including RTL and place-and-route. Excellent problem-solving skills and attention to detail...Broadcom is looking for a senior level STA engineer. In this highly visible role, you will be contributing to highly...

Company: Broadcom
Location: San Jose, CA
Posted Date: 09 Oct 2025
Salary: $120000 - 192000 per year