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Keywords: ASIC Design Efficiency Engineer, Location: Santa Clara, CA

Page: 1

ASIC Design Verification Engineer (Santa Clara, CA)

and products. This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team..., Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 22 Nov 2025
Salary: $126700 - 190100 per year

Senior Reset and Boot ASIC Engineer

NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously.... What you’ll be doing: Be an integral part of the System ASIC Design team to help with the Micro-architecture definition...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 01 Oct 2025

Senior ASIC Verification Engineer

We are looking to hire a Chip Design Verification Engineer to join NVIDIA Chip Design group. The work environment... devices at the forefront of technology in terms of performance and power efficiency. Our team is at the heart...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Nov 2025

Senior SOC Design Engineer

NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate... with brilliant minds to build cutting-edge GPUs and SOCs that power everything from AI to gaming! As a Senior SOC Design Engineer...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

PCB Layout Physical Design Engineer - CAD

your career. THE ROLE: As a PCB Layout Physical Design Engineer - CAD in our Networking Technology & Solutions Group (NTSG...), you will be responsible for ensuring that AMD’s next-generation products deliver industry-leading reliability, performance, and efficiency...

Posted Date: 24 Oct 2025

Senior Principal Engineer, Physical Design

understanding of current design technologies used in major foundries Strong understanding of ASIC design flow, RTL integration... Makefile, Tcl, Python, or Perl to enhance design efficiency and flow robustness Strong communication and collaboration skills...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

AI/ML Design Verification Methodology Lead Engineer

's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration..., or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

Senior Distinguished Engineer

+ years of experience in ASIC architecture and design, preferably in networking, switching, or high-performance SoCs..., generative AI fabrics, and global-scale networks that demand uncompromising performance. As a Senior Distinguished Engineer...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Dec 2025

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Hardware Engineer to join our Hardware Design team at our headquarters in Santa Clara, CA. In this role, you'll work at the... and optical networking platforms are built to push the limits of performance, density, and power efficiency. This wouldn't...

Company: Arista Networks
Location: Santa Clara, CA
Posted Date: 14 Dec 2025

Senior Storage Infrastructure Software Engineer

with team members and internal customers to optimize workflow efficiency and scalability. Drive improvements to SW design.... We are looking for a highly motivated senior software development engineer to develop and deploy software storage management systems for NVIDIA...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Dec 2025

CAD Engineer, AI Based Automation Development

in ASIC design efficiency, performance, turnaround time, and overall quality. What You Can Expect Design and develop... with experience in AI-driven application development and a solid foundation in ASIC design. You will help develop next-generation...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 11 Dec 2025
Salary: $105470 - 158000 per year

EDA Workflow Optimization Engineer

with ASIC, VLSI, CAD/EDA or mixed signal design workflow environments. Hands-on experience with EDA tools. Experienced... decades, inventing the GPU in 1999 to reshape PC gaming and modern computer graphics. As an engineer in our EDA Workflow...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 04 Oct 2025

Senior Power and Performance Engineer - System Memory

, ASIC, board/platform design, software/firmware, marketing, and other multi-functional teams to drive architecture, design... engineer to join a silicon HW team. As a team member, you will develop and validate system-level features with a deep...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Sep 2025

Sr. Product Engineer

Design a characterization/testing plan and work with R&D teams and manufacturing engineers to resolve various technical... collaboration with silicon foundry, imager characterization and pixel design; interact with foundry fab in improving all silicon...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 20 Dec 2025
Salary: $131706 - 135000 per year

Power Methodology Engineer, Data Center Hardware IPs

, and machine learning accelerators to optimize power efficiency and performance. This involves creating power management algorithms... the design cycle THE PERSON: You have a passion for modern, complex processor architecture, digital design...

Posted Date: 27 Nov 2025

System-Level ML Runtime & Driver Engineer (GPU/NPU) – ATG

and collaborate with compiler teams on graph optimizations that deliver performance, power, and memory efficiency across computer... teams across AMD. KEY RESPONSIBILITIES: Design and implement ML runtime components and device drivers for AMD machine...

Posted Date: 22 Oct 2025