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Keywords: ASIC Design Engineer, Location: Santa Clara, CA

Page: 4

Formal Verification Staff Engineer

, etc. PREFERRED EXPERIENCE: ASIC design, verification, or related work experience in Formal Verification. Verification skills... your career. THE ROLE: We are looking for an adaptive, self-motivated formal verification engineer to join our growing team...

Posted Date: 05 Dec 2025

Senior System/Solution Test Engineer

your career. THE ROLE: AMD is looking for a specialized software engineer who is passionate about improving the performance..., especially pertaining to algorithms and architecture Design and develop new groundbreaking AMD technologies Participating...

Posted Date: 04 Dec 2025

Senior Optical Signal Integrity / Power Integrity (SI/PI) Engineer

Integrity (SI/PI) Engineer to lead the design, simulation, and validation of high-speed electrical interconnects and power... architects, ASIC vendors, layout, packaging, and optical teams to co-optimize performance, manufacturability, and reliability...

Company: Arista Networks
Location: Santa Clara, CA
Posted Date: 26 Nov 2025

Senior Signal and Power Integrity Engineer - Hardware

We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two... the needle! What you'll be doing: Work on crafting creative Signal Integrity solutions to complex system design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Nov 2025

Senior Timing Methodology Engineer, Custom Circuits

with 5+ years experience in ASIC Design and Timing. Proven understanding of circuit design and spice simulations. Hands..., to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025

Senior Timing Methodology Engineer

To See: MS (or equivalent experience) in Electrical or Computer Engineering with 3 years’ experience in ASIC Design and Timing... usage in the ASIC flow. Hands-on experience in advanced CMOS technologies, design with FinFET technology 5nm/3nm/2nm...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Nov 2025

Principal Technical IP Engineer - Manage 3rd Party IP Integration - DDR/LPDDR/GDDR/HBM/eMMC memory

. Proficient in project management tasks required to manage 3rd party developers. Broad-based exposure to ASIC design flows..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Hardware Design Senior Staff...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 16 Nov 2025
Salary: $143200 - 214500 per year

Signal Integrity Engineer Intern (Cloud Platform Optics) - Master's Degree

ASIC’s with Marvell DSP’s. These components are made operational with a highly functional embedded firmware. The team... is responsible for design, verification, and validation of these integrated high speed optical components. The team performs system...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 16 Nov 2025
Salary: $31 - 63 per hour

Firmware Engineer Intern - MASTER'S Degree

and custom ASIC platforms, embedded software for SSDs, or trusted firmware stacks for hardware security modules. Other teams... As a Firmware Engineer Intern at Marvell, you could: Develop and maintain embedded firmware for advanced hardware platforms...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Nov 2025
Salary: $32 - 64 per hour

Firmware Engineer Intern - BACHELOR'S Degree

and custom ASIC platforms, embedded software for SSDs, or trusted firmware stacks for hardware security modules. Other teams... As a Firmware Engineer Intern at Marvell, you could: Develop and maintain embedded firmware for advanced hardware platforms...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Nov 2025
Salary: $27 - 55 per hour

Principal Hardware Engineer, Optics

ASIC’s with Marvell DSP’s. These components are made operational with a highly functional embedded firmware. The team... is responsible for design, verification, and validation of these integrated high speed optical components. The team performs system...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Nov 2025
Salary: $143200 - 214500 per year

Integration Engineer

engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design... and Synthesis: Run and debug lint, CDC/RDC, and logic synthesis to ensure design quality. • Build and Test Infrastructure: Develop...

Company: Apple
Location: Santa Clara, CA
Posted Date: 07 Nov 2025
Salary: $126800 - 190900 per year

SR Hardware Validation & Sustaining Engineer

to Have: Experience with specific hardware technologies, such as FPGA, CPLD, ASIC, or high-speed digital design. Experience... your career. THE ROLE: This is an exciting opportunity for an experienced SR Hardware System Engineer to work on cutting-edge...

Posted Date: 29 Oct 2025

CPU DFT Verification Engineer

verification team focusing on DFT verification. In this highly visible role, you will be at the center of a chip design effort.... Description As a CPU DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Product Engineer Intern - Master's Degree

join a high-performing team working on advanced semiconductor technologies. You’ll collaborate with ASIC Design, Applications..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Product Engineer Intern, you’ll...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 26 Oct 2025
Salary: $22 - 45 per hour

Sensor Engineer

devices. Job activities span the ASIC design process from specification definition, high-level design, coding and verification... tools. Experience with ASIC ECO flow, RTL sanity tools specific to Design Rule Checking and Clock Domain Crossing checks...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 18 Jan 2026

Principal CAD Engineer

Central Engineering, you will play a leading role on developing next-generation automated design flow and its add-on tools.... You will have the opportunity to use your extensive design and CAD knowledge to participate in defining the whole organization's design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 09 Jan 2026
Salary: $146850 - 220000 per year

Senior Platform Networking Software Engineer, Systems Engineering

: Drive the end-to-end design and debugging of C/C++ networking software to ensure next-generation switching and fabric... customers. Lead Hardware-Software Integration: Partner with ASIC vendors and internal platform teams to implement switch SDK...

Company: Pure Storage
Location: Santa Clara, CA
Posted Date: 01 Jan 2026

Senior CAD Infrastructure Development Engineer

, VLSI, and ASIC development principles, including logic cells. Strong software engineering skills, including software... design, algorithms, and QA. Extensive experience in Python and C++ programming. Knowledge of GenAI, LLM, and AI Code...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Dec 2025

Sr. Product Engineer

Design a characterization/testing plan and work with R&D teams and manufacturing engineers to resolve various technical... collaboration with silicon foundry, imager characterization and pixel design; interact with foundry fab in improving all silicon...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 20 Dec 2025
Salary: $131706 - 135000 per year