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Keywords: Senior Timing Methodology Engineer, Location: Santa Clara, CA

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Senior Timing Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive..., self-heating, thermal impact, IR drop etc. Collaborate with technology leads, VLSI physical design, and timing engineers...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Jul 2025

Senior Timing and Constraints Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking an innovative senior timing signoff and constraint methodology... engineer to develop pioneering timing sign-off strategies for next-generation GPUs and SoCs. In this role, you’ll develop...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

Senior Async and IO Timing Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise... (or equivalent experience). 6+ years of experience in static timing analysis, methodology, or constraint development...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

Senior ASIC Timing Engineer

. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual... advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 12 Jun 2025

Senior ASIC Physical Design and Timing Engineer

, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic... interacting with multiple teams. Apply knowledge and experience to improve timing convergence flows working with the methodology...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Jun 2025

Senior Post-Silicon Validation and Methodology Engineer

is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is uniquely positioned to have an end-to-end view... in digital design, system and microarchitecture, timing, clocking, power, noise, and control systems; Deep understanding of SW...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 05 Jun 2025

Senior Silicon Engineer

, scalable and programmable DPU silicon. As a Senior Silicon Engineer in the Data Processing Unit team you will be validating...? The Data Processing Unit (DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon...

Company: Microsoft
Location: Santa Clara, CA
Posted Date: 07 Aug 2025

Senior SoC Design Engineer

with architects, chip leads, and customers on SoC IP design, timing closure, power analysis, methodology alignment, and program... to do their best work. Come join the team and see how you can make a lasting impact on the world. Join NVIDIA as a Senior SoC Design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 15 Jul 2025

Senior ASIC Synthesis Engineer

. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you are problem solver and highly motivated... advanced technology team to optimize design tradeoffs and methodology on next generation CMOS technology...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Jul 2025

Senior Staff Engineer, Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Staff Physical Design... Engineer at Marvell Technology, you will be a key part of a highly skilled global team focused on designing next-generation...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 11 Jun 2025
Salary: $124420 - 186400 per year

Senior ASIC Design Engineer - DFX

We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades... be doing: As a key member of the DFX methodology team, you will be responsible for the architecture, design, implementation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

Senior Staff Physical Design Engineer

physical design and methodology for future designs of our next-generation, high-performance processor and data center chips... in physical design of complex chips as well as contribute towards methodology to enable an efficient and robust design process...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 03 Jul 2025
Salary: $124420 - 186400 per year

Principal Engineer, Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance.... What You Can Expect For senior engineering candidates seeking a challenging and impactful role, this position at Marvell involves...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 18 Jun 2025
Salary: $146850 - 220000 per year