Keywords: ASIC Engineering Technical Lead :: DFT/MBIST/ATPG/Scan Insertion :: Exp 12+ Years, Location: Bangalore, Karnataka

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ASIC Engineering Technical Lead :: DFT/MBIST/ATPG/Scan Insertion :: Exp 12+ Years

or Computer Engineering required with at least 10 years of experience. Knowledge of the latest innovative trends in DFT, test... in DFT, test and silicon engineering. Experience with Jtag protocols, Scan and BIST architectures, including memory...

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Company: Cisco Systems

Location: Bangalore, Karnataka

Posted Date: 21 Jul 2025

ASIC DFT Engineer || MBIST, Scan Insertion, JTAG, ATPG || Exp 7 to 12 Years

With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus.... Knowledge of the latest innovative trends in DFT, test and silicon engineering. Background with Jtag protocols, Scan...