job: Senior ASIC Engineer San Jose, CA-onsite $230k Our client, a cutting-edge developer of custom ASICs and SoCs...
Our client, a cutting-edge developer of custom ASICs and SoCs for emerging technologies, is seeking a Senior ASIC...
plan development for analog ASICs at OSAT partners Strong understanding of mixed-signal design: ADCs, DACs, bias circuits...
plan development for analog ASICs at OSAT partners Strong understanding of mixed-signal design: ADCs, DACs, bias circuits...
-power ASICs. Perform Back-End Physical Design as needed Floorplanning and power grid design. Place and Route (APR...
a pivotal role in the development of custom-designed ASICs. Your expertise will span the entire chip design lifecycle...
a pivotal role in the development of custom-designed ASICs. Your expertise will span the entire chip design lifecycle...
is responsible ASIC cost strategy, including cost management/should cost model/negotiations, to ensure ASICs meet the price... job responsibilities Develop product cost models for ASICs, including wafer, bump, assembly, test, and yield components Create...
engineering and ASIC implementation). In this role, you will be developing next-generation ASICs for deployment in space... on complex SoCs or ASICs Hands-on experience with Automated Test Equipment (ATE) platforms (e.g., Teradyne, Advantest) for high...
engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space... engineering, computer engineering or computer science 1+ years of professional experience working with ASICs Experience in scan...
, debug and/or verification of ASICs or FPGAs Demonstrated self-starter and voracious learner with high EQ. Control Accounts...
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group ASICS Engineering General...
, debug and/or verification of ASICs or FPGAs Demonstrated self-starter and voracious learner with high EQ. Control Accounts...
engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation FPGAs and ASICs... performance and capabilities of the Starlink network. RESPONSIBILITIES: Design digital ASICs and/or FPGAs for Starlink...
engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation FPGAs and ASICs... performance and capabilities of the Starlink network. RESPONSIBILITIES: Design digital ASICs and/or FPGAs for Starlink...
-based designs. Familiarity with formal verification techniques and tools. Experience with verification of ASICs targeting...