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Keywords: CPU Physical Design Engineer, Location: Santa Clara, CA

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CPU Physical Design Methodology and Optimization Engineer

with CPU, CAD, and design teams to engineer new flows/algorithms to improve PPA • Detailed analysis across partitions... groundbreaking Apple products! In this highly visible role as a part of an industry-recognized and innovative CPU design team...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025

CPU Physical Design Methodology and Optimization Engineer

with CPU, CAD, and design teams to engineer new flows/algorithms to improve PPA • Detailed analysis across partitions... groundbreaking Apple products! In this highly visible role as a part of an industry-recognized and innovative CPU design team...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025

CPU Physical Design Engineer

design. Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS... groundbreaking Apple products! Apple's Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level physical...

Company: Apple
Location: Santa Clara, CA
Posted Date: 05 Nov 2025

CPU Design Timing Engineer

. Description As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include... to improve analysis flows and engineer efficiency. • Work extensively with CPU micro-architects and Implementation engineers...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Design Timing Engineer

. Description As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project. Responsibilities include... to improve analysis flows and engineer efficiency. • Work extensively with CPU micro-architects and Implementation engineers...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Power Management Microarchitect/RTL Engineer

, Vision Pro, and Mac. We are looking for an experienced engineer to help drive architecture and RTL for world-class CPU power... management solutions. Description As a CPU Power Management Microarchitect/RTL Engineer, you will own or contribute to the...

Company: Apple
Location: Santa Clara, CA
Posted Date: 31 Oct 2025

CPU Cache Microarchitect/RTL Engineer

-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability... our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer who can...

Company: Apple
Location: Santa Clara, CA
Posted Date: 30 Oct 2025

CPU ML Microarchitect/RTL Engineer

engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power... our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac We are looking for an experienced engineer to drive...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Microarchitect/RTL Engineer - Execution, Load/Store

, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer..., floating-point, and/or load/store execution for our performant cores. Description As a CPU Microarchitect/RTL Engineer...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU ML Microarchitect/RTL Engineer

engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power... our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac We are looking for an experienced engineer to drive...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Microarchitect/RTL Engineer - Fetch, Out of Order

, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU front-end... and/or out-of-order subsystem for our performant cores. Description As a CPU Microarchitect/RTL Engineer, you will own...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Microarchitect/RTL Engineer - Execution, Load/Store

, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer..., floating-point, and/or load/store execution for our performant cores. Description As a CPU Microarchitect/RTL Engineer...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Gate Level Synthesis Engineer

design, RTL synthesis, and physical design Preferred Qualifications The ideal candidate should ideally possess CPU... groundbreaking Apple products! Apple's Silicon Engineering Group (SEG) is looking for a hardworking engineer for our CPU Gate Level...

Company: Apple
Location: Santa Clara, CA
Posted Date: 28 Oct 2025

CPU Silicon Validation Technical Program Manager

core (preferably CPU) design & debug background including Project Management of IP team working on multiple programs... Management General Summary: The successful candidate will own technical program management for the Oryon CPU Engineering team...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 07 Jan 2026

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU... future of computing. What you'll be doing: As a member of our CPU team, you'll be a liaison between Logic design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Nov 2025

ASIC Design Engineer, GPU/ML Shader Core

your career. THE ROLE: We are looking for a ASIC Design Engineer, GPU/ML Shader Core who are motivated to challenge the status... to debug functional, performance or power test failures Work with Physical Design team to close on timing, area and power...

Posted Date: 19 Dec 2025

ASIC Clocks Design Engineer - New College Grad 2025

the GPU or CPU clocks to satisfy all the architectural/design/physical constraints. Improve Power, Performance, and Area... ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Dec 2025
Salary: $108000 - 184000 per year

Senior ASIC Design Engineer – Clocks IP

the GPU or CPU clocks to satisfy all the architectural/design/physical constraints. Improve Power, Performance, and Area... ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Principal Interconnect Micro-architect and RTL Design Engineer

, and physical design team to drive the RTL design and microarchitecture of modular network on chip IPs for AMD Data Center silicon... to physical design and verification methods Experience with scripting languages such as Perl, Python, Unix shells and Makefiles...

Posted Date: 17 Dec 2025

GPU Compiler Engineer

Job Details: Job Description: Job Description Responsible for the definition, design, development, test, debugging... with hardware design team, companies and communities developing compilers, and participate in language and standards groups...

Company: Intel
Location: Santa Clara, CA
Posted Date: 16 Jan 2026