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Keywords: Chip Integration Engineer, Location: San Jose, CA

Page: 1

Chip Integration Engineer

successful candidate will be responsible for various key tasks in the areas of chip integration and RTL design of cutting-edge network... and various subsystems within these chips. 2). Doing chip level integration and putting all the functional blocks, soft/hard IPs...

Company: Broadcom
Location: San Jose, CA
Posted Date: 20 Nov 2025
Salary: $120000 - 192000 per year

Physical Design Engineer

, icc2, innovus, timing analysis Senior Engineer to design and implement high-performance digital systems using VHDL... looking for a hands-on Physical Design Engineer to support complex SoC projects for our client who designs and delivers advanced System...

Posted Date: 14 Jan 2026

Sr. Design Verification Engineer

, which employs over 32,000 people across 80+ locations globally. Prodapt is seeking a highly skilled and adaptable engineer... to join our dynamic team, focusing on System-on-Chip (SoC) verification. In this role, you will work on complex SoC designs...

Company: Prodapt
Location: San Jose, CA
Posted Date: 14 Jan 2026

Senior Silicon Design Engineer

Design Engineer to join our AECG SIT team. This role involves leading and contributing to the design, integration... in IC design and manufacturing including analog/digital IP integration, chip design, silicon process or packaging...

Posted Date: 14 Jan 2026

Sr. Design Verification Engineer

a highly skilled and adaptable engineer to join our dynamic team, focusing on System-on-Chip (SoC) verification. In this role...-speed interfaces, including PCIe, USB, NOC, NVMe, Ethernet, LPDDR5, and HBM2, to ensure seamless integration into complex...

Company: Prodapt
Location: San Jose, CA
Posted Date: 13 Jan 2026

Field Application Engineer, New College Graduate (Teradyne, San Jose, CA)

Field Application Engineer, who will work collaboratively with the team as well as independently to determine and develop... and deployment of test solutions on Automated Test Equipment (ATE) for Digital, High-Speed Digital, System on Chip, Mixed Signal...

Company: Teradyne
Location: San Jose, CA
Posted Date: 10 Jan 2026
Salary: $81800 per year

Field Application Engineer (SEG; San Jose, CA; Austin, TX or Chandler, AZ)

Field Application Engineer, who will work collaboratively with the team as well as independently to determine and develop...-Speed Digital, System on Chip, Mixed Signal and Analog semiconductor devices. Test program software development, often...

Company: Teradyne
Location: San Jose, CA
Posted Date: 09 Jan 2026
Salary: $104000 per year

Design Engineer II

. Job Description: We are looking for a highly skilled and motivated 3DIC Design Flow Engineer to implement system planning and integration of complex HPC... AI applications. This is a challenging and rewarding opportunity for a highly motivated engineer with a passion for innovation...

Posted Date: 08 Jan 2026
Salary: $101500 - 188500 per year

Senior SoC RTL Design Engineer (remote)

Senior RTL Design Engineer MUST be a US Citizen Remote / work from any US location Full-time/employee + Bonus... failures at block and chip level Participate in architectural feasibility studies Participate in ECO implementation Resolve...

Location: San Jose, CA
Posted Date: 05 Jan 2026

Analog/Mixed-Signal IC Layout Engineer (Senior Level)

integration for large-scale chip assemblies. Apply best-practice layout techniques for reliability, thermal awareness...Yoh is seeking an experienced Analog/Mixed-Signal IC Layout Engineer to support the design and implementation of high...

Company: Yoh
Location: San Jose, CA
Posted Date: 04 Jan 2026
Salary: $70 - 80 per hour

Principal ASIC Test Development Engineer

Principal ASIC Test Development Engineer This role has been designed as ‘Hybrid’ with an expectation... ATE-level tests to solve such issues, per strong knowledge of a chip’s design. Responsible for influencing supplier testing...

Posted Date: 19 Dec 2025

Field Application Engineer (SEG, San Jose or Phoenix)

Field Application Engineer in ATE (Automated Test Equipment) and SLT (System Level Testing), who will work collaboratively.... Develop, debug and deployment of test solutions on ATE for Digital, High-Speed Digital, System on Chip, Mixed Signal...

Company: Teradyne
Location: San Jose, CA
Posted Date: 18 Dec 2025
Salary: $97800 - 156400 per year

Data Center Infrastructure Engineer

Job Summary: We are seeking a highly skilled and motivated Data Center Infrastructure Engineer to join our dynamic... with an emphasis on Building Management System (BMS) integration. This role will support both air-cooled and liquid-cooled environments...

Posted Date: 04 Dec 2025

Staff Electrical Engineer

are changing the way the world communicates. Requisition ID: 76525 Description This position is for a Staff Design Engineer..., including SAW and BAW technology, for RF front-end modules. Responsibilities Design acoustic wave filters for integration...

Company: Skyworks
Location: San Jose, CA
Posted Date: 25 Nov 2025
Salary: $114400 - 220200 per year

Lead Verification Engineer

Overview: Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead MTS Verification... Engineer to join our Security team in San Jose/San Francisco, US. Candidates will be joining some of the brightest inventors...

Company: Rambus
Location: San Jose, CA
Posted Date: 23 Nov 2025

Field Applications Engineer- ATE & SLT (SEG, San Jose)

Field Application Engineer in ATE (Automated Test Equipment) and SLT (System Level Testing), who will work collaboratively.... Develop, debug and deployment of test solutions on ATE for Digital, High-Speed Digital, System on Chip, Mixed Signal...

Company: Teradyne
Location: San Jose, CA
Posted Date: 23 Nov 2025
Salary: $139400 per year

Field Application Engineer (SEG, San Jose)

Field Application Engineer, who will work collaboratively with the team as well as independently to determine and develop...-Speed Digital, System on Chip, Mixed Signal and Analog semiconductor devices. Test program software development, often...

Company: Teradyne
Location: San Jose, CA
Posted Date: 21 Nov 2025

Field Application Engineer (SEG, San Jose)

Field Application Engineer, who will work collaboratively with the team as well as independently to determine and develop...-Speed Digital, System on Chip, Mixed Signal and Analog semiconductor devices. Test program software development, often...

Company: Teradyne
Location: San Jose, CA
Posted Date: 21 Nov 2025
Salary: $170500 per year

Senior Principal Emulation Design Engineer

. We are seeking a highly skilled Design Engineer to join our Palladium Solutions Development team, to drive the development of full... [Serdes, Chip 2 chip link] based subsystems in Emulation Platforms. Development includes Parallel and Serial models...

Posted Date: 19 Nov 2025

Embedded Adaptive Hardware Engineer

Design Engineer Location: San Jose, CA (Hybrid) Time Type: Full time Job Type: Regular Hiring Manager: Fang-Li Yuan... recognized as “the Intelligent Edge company,” leading digital transformation and reimagining the engineer’s journey...

Company: Analog Devices
Location: San Jose, CA
Posted Date: 09 Nov 2025