NVIDIA is seeking a passionate, creative, and highly motivated engineer to work on architectural power estimation... to estimate chip and board power under product driven use cases. You are expected to understand the high-level chip architecture...
(UPF or CPF) Power estimation and reduction tools (PowerArtist/PTPX,Calypto) Power dissipation and power savings... or MVRC Outstanding written and verbal communication skills Responsibilities Defining chip and macro level power...
, modeling, and optimization of performance and power consumption across various stages of our cutting-edge chip development... architectural-level and/or cycle-accurate models for performance and power estimation. Analyze trade-offs between performance...
in different on-chip interconnect topologies (e.g., mesh, crossbar) - Understanding of various snoop and data network protocols... - numa/nuca architecture - Proficient in HDLs- VHDL / Verilog - Experience in High speed and Power efficient logic design...
_ MTS SILICON DESIGN ENGINEER THE ROLE: AMD is looking for an experienced SOC FullChip Timing(FCT) Engineer to deliver... up from basics like how work spaces are setup, how blocks are coordinated and interacted in a System-On-Chip environment...
with RTL & Physical designers to resolve them. Perform Power Estimation at RTL and Gate Level and identify power reduction..., synthesis to build efficient System on Chip (SoC) and IP for data center application. Successful candidates must remain in role...
, you will be responsible for the micro architecture, design and development of a high-bandwidth, low-latency on-chip interconnect (NoC...) and chip-to-chip interconnect and integration into high-performance IBM Systems. Design and architect different interconnect...
processing functions like filters, matrix transformations (e.g.: QR, Cholesky decomposition), channel estimation, equalization... chip solutions. The WLAN PHY team in Bangalore is instrumental in realizing this vision. Requirements...
Job Description: Responsibilities: OnSemi is seeking a Staff Analog layout Engineer, NEW PRODUCT DEVELOPMENT, Power... etc) Contribute to area estimation and optimization, floor planning, power routing, shielding, physical verification (DRC, ERC, LVS...
Job Description: Responsibilities: OnSemi is seeking a Senior Principal Analog Layout Engineer, NEW PRODUCT... DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power...
Job Description: Responsibilities: OnSemi is seeking a Staff Analog layout Engineer, NEW PRODUCT DEVELOPMENT, Power... etc) Contribute to area estimation and optimization, floor planning, power routing, shielding, physical verification (DRC, ERC, LVS...