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Keywords: DDR/ PCIE High Speed Interface IP Physical Design Engineer (Sr. Lead/Staff), Location: Bangalore, Karnataka

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DDR/ PCIE High Speed Interface IP Physical Design Engineer (Sr. Lead/Staff)

from product-based/EDA companies. DDRPhy /PCIE-high speed interface PD or 3DIC Expertise Timing Signoff experience with SNPS... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 22 May 2025