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Keywords: Design-for-Test (DFT) Engineer, Location: Santa Clara, CA

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Design-for-Test (DFT) Engineer

, secure, and performance-optimized compute. As a Design-for-Test Engineer, you’ll help ensure silicon reliability and debug... with physical design teams to meet DFT constraints Support test pattern generation, debug, and post-silicon validation...

Company: Initio Capital
Location: Santa Clara, CA
Posted Date: 04 Aug 2025

Senior DFT Engineer

, to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works... on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jul 2025

DFT Engineer - CPU

you will work with chip architects, chip designers, implementation engineers and test engineers to verify the DFT and DFD (Design... Strong fundamentals in digital ASIC design; experience using Verilog or VHDL Experience with ASIC test, DFT, and debug 2+ years...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 05 Jul 2025

Senior DFT Methodology Engineer

of experience in DFT, system architecture, or RTL design. Understanding of fundamental DFT topics, such as, fault modeling, ATPG... on groundbreaking innovations involving crafting creative solutions for cutting edge test techniques, in-system test architecture...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Jul 2025

Senior DFT Engineer

DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation... experience in Electrical Engineering or a related field 5+ years of hands-on experience in Design-For-Test (DFT) Deep...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 17 Jun 2025

Test Chip Design & Validation Engineer

at the start of a fast-paced new design cycle. You will work with production chip architects, front end and DFT teams, custom... IP design engineers, test & product engineers, silicon validation systems engineers to realize detailed testing of the...

Company: Apple
Location: Santa Clara, CA
Posted Date: 22 Jul 2025

Senior Design For Test Engineer

compared to CPU-based alternatives Microsoft DPU team in Santa Clara is looking for a Senior Design For Test Engineer to help... and validation for various fault models Timing constraint development for DFT structures Design and integrate test structures...

Company: Microsoft
Location: Santa Clara, CA
Posted Date: 18 Jul 2025

Senior ASIC Synthesis Engineer

across multiple design blocks Work with DFT and Verification teams to ensure functional and timing correctness What we need... to stand out from the crowd: Knowledge of DFT/Test logic including JTAG, scan, high speed I/O loopback, and memory...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 05 Aug 2025

Electrical Engineer Hardware

Electrical Hardware Engineer – IVUS Company Position Overview NuevoSono, a T45 Labs portfolio company is seeking... an Electrical Hardware Engineer to join our innovative team developing lntravascular Ultrasound (IVUS) systems. The ideal candidate...

Company: T45 Labs
Location: Santa Clara, CA
Posted Date: 02 Aug 2025
Salary: $140000 - 190000 per year

Senior Reliability Methodology Development Engineer

flawlessly. Your key duties will include: Collaborate with design, product, and test engineering teams to apply DFT.... What you'll be doing: As a Reliability Engineer at NVIDIA, you will be responsible for ensuring our products and systems operate...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 01 Aug 2025
Salary: $108000 - 172500 per year

Principal Test Engineer

motivated and talented Principal Test Engineer to join our dynamic NPI product engineering team. You will work on cutting-edge... to design, develop, and debug innovative products and solutions. What You Can Expect Lead Cutting-Edge ATE Test Solutions...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 23 Jul 2025
Salary: $133500 - 200000 per year

Integration Engineer

engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design... and Synthesis: Run and debug lint, CDC/RDC, and logic synthesis to ensure design quality. • Build and Test Infrastructure: Develop...

Company: Apple
Location: Santa Clara, CA
Posted Date: 23 Jul 2025

Principal Server Software Integration Engineer

-functional teams Contributions to FW architecture and design with a focus on smooth integration and Design For Test (DFT) Cross... Integration Engineer As a Server Software Integration Engineer, you will take on a lead technical role within the product...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 17 Jul 2025

Senior Staff Product Engineer

introduction (NPI) activities including test characterization, yield ramp, and manufacturability. Partner with design, DFT/DFM... globe. As a Senior Staff Product Engineer, you’ll join a highly skilled and passionate team responsible for the...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 16 Jul 2025
Salary: $111780 - 167500 per year

ASIC Design Engineer

NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA... of DRAM controllers is a plus. Experience with all stages in the ASIC design flow including emulation, prototyping, DFT...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 16 Jul 2025

CPU Cache RTL Engineer

our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer who can... Cache RTL Engineer, you will participate in the following: • Micro-architecture development and specification - from early...

Company: Apple
Location: Santa Clara, CA
Posted Date: 16 Jul 2025
Salary: $126800 - 190900 per year

Principal Test Engineer

manufacturing capabilities to build our next generation network firewalls. We are looking for a talented test engineer... with extensive experience in developing diagnostics and validation. The ideal candidate is expected to have a deep test design...

Location: Santa Clara, CA
Posted Date: 15 Jul 2025

Principal Test Engineer

manufacturing capabilities to build our next generation network firewalls. We are looking for a talented test engineer... with extensive experience in developing diagnostics and validation. The ideal candidate is expected to have a deep test design...

Location: Santa Clara, CA
Posted Date: 15 Jul 2025

Principal Test Engineer (Hardware)

, covering structural and functional testing for PCBA and System level Drive DfT (Design for Testability) and functional test... manufacturing capabilities to build our next-generation network firewalls. As a senior test engineer, you will be responsible...

Location: Santa Clara, CA
Posted Date: 06 Jul 2025

Senior Principal Test Engineer (Hardware-ICT)

product designs of various design complexities for test coverage and serviceability with ICT and boundary scan Drive DfT... manufacturing capabilities to build our next-generation network firewalls. As a senior test engineer, you will be responsible...

Location: Santa Clara, CA
Posted Date: 06 Jul 2025