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Keywords: IP Design Verification Engineer, Location: Santa Clara, CA

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Senior Principal Digital IC Design Engineer

Design Engineer at Marvell, you will be part of the DCE – Connectivity Business Group, contributing to the development... for subsystems and IP blocks. Lead RTL development and integration, ensuring modularity, reusability, and compliance with design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 11 Nov 2025

Principal Engineer, Physical Design

RTL, verification, and CAD, to ensure cohesive and optimized design execution. Mentor and coach senior and junior... infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 29 Oct 2025
Salary: $146850 - 220000 per year

RTL/Logic Design Engineer

logic design engineer in the Dram Controller IP at AMD's Santa Clara Design Center. You will be working in a fast-paced... Console APUs using a flexible controller design as the base for all our IP. We are looking for an experienced, conscientious...

Posted Date: 08 Oct 2025

Digital IC Design Staff Engineer

design and application-specific integrated circuit (ASIC) design flows. Perform RTL coding and functional verification..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Staff...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Oct 2025
Salary: $105470 - 158000 per year

Senior ASIC RTL Design Engineer

. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design... processor architecture, digital design as well as verification/design quality. You are a team player who has excellent...

Posted Date: 26 Dec 2025

Principal Interconnect Micro-architect and RTL Design Engineer

and performance/power. In this role the candidate will work with IP and SOC Architecture team, RTL design team, verification team... and design Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets...

Posted Date: 17 Dec 2025

Senior Principal Engineer, Physical Design

experience in back-end physical design and verification, including significant leadership roles Proven track record of leading... infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

DFT Design Engineer

for physical implementation. Reviews the verification plan and drives verification of the DFT design to achieve desired... in design and validation. Drives high test coverage through structural and specific IP tests to achieve the quality and DPM...

Company: Intel
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

DFT Design Engineer

for physical implementation. Reviews the verification plan and drives verification of the DFT design to achieve desired... in design and validation. Drives high test coverage through structural and specific IP tests to achieve the quality and DPM...

Company: Intel
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Analog Design Engineer

and timing analysis, and reliability checks. Interface with cross-functional teams like RTL, Verification and Physical Design... of key IP in Digital and Analog/Mixed-Signal domains catering to AMD products across multiple business units. With a good mix...

Posted Date: 09 Dec 2025

Senior Staff Engineer, Physical Design

verification) using industry standard EDA tools Work with RTL design teams to drive assembly and design closure. Provide... infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $124420 - 186400 per year

Senior Engineer, Physical Design

infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $89360 - 133900 per year

Senior Layout Mask Design Engineer

of our next generation custom SRAM design. As part of the Digital IP Team, you will work with other team members on the new process design... and verifying against design rules and schematics. Perform power robustness check and EMIR verification and fixes Negotiation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025
Salary: $124000 - 195500 per year

Senior SRAM Circuit Design Engineer

. We are looking for you. You will work on the design and development of our next generation of custom SRAM design. As part of the Digital IP Team, work..., and develop in-house design and verification flows for SRAM design that would be used on all the NVIDIA products. What you'll...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Nov 2025

Physical Design Methodology Engineer

, you will work closely with the architecture, IP design, RTL design, CAD, silicon technology teams and product engineers to achieve... related to Artificial Intelligent/ High Performance Computing SOCs . As a member of the Physical design and SOC teams...

Posted Date: 09 Nov 2025

Senior Staff FPGA/Firmware Design Engineer

or similar field. Proficiency in FPGA architecture, design, modelling, simulation, and verification. Expertise in Verilog..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Design and architecture for Central...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Nov 2025
Salary: $121400 - 181800 per year

Analog IC Design Engineer, Principal Engineer

a team of analog design engineers, interface with layout, verification, and application teams and manage delivery of analog..., DDR5/LPDDR5; GDDR6/LPDDR6 a plus Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 22 Oct 2025
Salary: $165630 - 248100 per year

Sales Executive Semiconductor Chip Design Engineering Services

, and IP providers. Background in ASIC Design or Semiconductor Technology R&D is advantageous, ideally with experience... design, software, hardware, supply chain, and sustainability. Key Responsibilities: We develop and maintain relationships...

Posted Date: 10 Dec 2025

Product Engineer - Tessent DFT

as Product Engineer, specializing in design-for-test (DFT). Tessent is the market and technology leader of automated tools...Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies...

Company: Siemens
Location: Santa Clara, CA
Posted Date: 12 Dec 2025
Salary: $129600 - 233300 per year

L6 Product Development FA Engineer

for a client ͏ Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the... architecture of the module or the IP and create verification environment and the development plan as per Universal Verification...

Company: Wipro
Location: Santa Clara, CA
Posted Date: 12 Dec 2025
Salary: $45000 - 110000 per year