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Keywords: DFT Design Engineer, Location: Santa Clara, CA

Page: 1

Principal Engineer - Design For Test (DFT)

will be challenging and will require an experienced DFT engineer that can work with existing DFT solutions while also creating new... and implementing DFT/Test on complex IP and SOC for multiple custom/compute ASIC/SoC designs The execution involves Design-for-Test...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 15 Nov 2025
Salary: $146850 - 220000 per year

DFT Design Engineer

to: Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well..., and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to qualify the design to meet power...

Company: Intel
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

DFT Design Engineer

to: Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well..., and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to qualify the design to meet power...

Company: Intel
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Senior DFT Engineer

, to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works... on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 30 Oct 2025

CPU DFT Verification Engineer

verification team focusing on DFT verification. In this highly visible role, you will be at the center of a chip design effort.... Description As a CPU DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU DFT Verification Engineer

verification team focusing on DFT verification. In this highly visible role, you will be at the center of a chip design effort.... Description As a CPU DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025
Salary: $126800 - 190900 per year

Senior DFT Methodology Engineer

with 2+ years of experience in DFT, system architecture, or RTL design. Understanding of fundamental DFT topics... fundamentals. Experience in architecting DFT access mechanisms in 3D stacked and dielet/chiplet based designs, and UCIe protocol...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Oct 2025

Senior DFT Engineer

DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation... experience in Electrical Engineering or a related field 5+ years of hands-on experience in Design-For-Test (DFT) Deep...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 18 Oct 2025

ASIC Clocks Design Engineer - New College Grad 2025

ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team... collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts with the...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Dec 2025
Salary: $108000 - 184000 per year

Senior SOC Design Engineer

NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate... with brilliant minds to build cutting-edge GPUs and SOCs that power everything from AI to gaming! As a Senior SOC Design Engineer...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Generative AI (GenAI) Design Engineer (Contract)

Position : Generative AI (GenAI) Design Engineer (Contract) Location : Santa Clara, CA (Day 1 Onsite...) Job Description : We are seeking a Generative AI (GenAI) Design Engineer to join our team and drive innovation in AI-powered solutions. This role...

Company: Sapear Inc
Location: Santa Clara, CA
Posted Date: 05 Dec 2025

GenDesign/Inverse Design Ai Engineer

Position: GenDesign/Inverse Design Ai Engineer Location: Santa Clara, CA***Day 1 Onsite*** Duration: 1 Years...) Design Engineer to join our team and drive innovation in AI-powered solutions Good To have Skills Skill 1 Familiarity...

Posted Date: 04 Dec 2025

Staff Design Engineer

design engineer responsible for the design, verification and evaluation of digital circuits in high-speed data communication..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Staff Design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 12 Nov 2025
Salary: $105470 - 158000 per year

Digital IC design Engineer

Engineer with Marvell, you’ll be a member of the Custom compute and solutions group. Our design team works on state-of-the-art..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Hardware Design Senior Staff...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Nov 2025
Salary: $121400 - 181800 per year

DDR Design Verification Engineer

your career. THE ROLE: We are looking for an experienced Verification Engineer to join our team as a Technical Lead... solutions for marketing/feature change requests Work closely with Design teams for Area and Floorplan refinement, Verification...

Posted Date: 07 Nov 2025

Senior ASIC Design Engineer – Clocks IP

ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team... collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts with the...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Senior ASIC Design Engineer - DFX

We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades... to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Oct 2025

ASIC Design Engineer

NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA..., you'll join a group of hard-working engineers to design and implement innovative coherent fabrics for our Tegra SoCs...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Oct 2025
Salary: $108000 - 184000 per year

Digital IC Design Staff Engineer

integration (VLSI) architecture, SCAN/design for testing (DFT) methodology, and test patterns. Provide design documentation..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Staff...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Oct 2025
Salary: $105470 - 158000 per year

Senior ASIC Physical Design Engineer, Netlisting

, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer... human inventiveness and intelligence. What you'll be doing: You will drive physical design of high-frequency and low...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 07 Oct 2025