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Keywords: Senior ASIC Design Engineer - DFX, Location: Santa Clara, CA

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Senior ASIC Design Engineer - DFX

We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades... Be Doing: As a key member of our DFX Methodology Team, you will play a critical role in shaping the architecture, design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Oct 2025

Senior ASIC Engineer - DFX

We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think... from you! What you'll be doing: Support the deployment of advanced Design-For-Test (DFT) and Automatic Test Pattern Generation (ATPG...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 16 Nov 2025

Senior ASIC Design Engineer – Clocks IP

ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team... of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Principal Engineer - Design For Test (DFT)

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Senior... and implementing DFT/Test on complex IP and SOC for multiple custom/compute ASIC/SoC designs The execution involves Design-for-Test...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 15 Nov 2025
Salary: $146850 - 220000 per year