power-aware simulation methodologies. Lead the verification effort for designs with multiple asynchronous clocks, employing... in Electrical/Computer Engineering or a related field. 5+ years of hands-on experience in ASIC/SoC Design Verification. Direct...
_ SMTS SILICON DESIGN ENGINEER Drive and lead execution with SOC teams for Design. Drive efficiency on execution of SOC..., DFT, Verification, Test-plan, Power Reduction, Timing Convergence & Floorplan, Tape-outs, System engineering and SW...
_ Drive and lead execution with SOC teams for Design. Drive efficiency on execution of SOC for integration as well... across from concept to tape-out and productization. Contribute to Bounding box analysis, Design, DFT, Verification, Test-plan, Power...
for complex SoC/ASIC designs. Responsible for floorplanning, partitioning, placement, CTS, routing, and physical verification...) using tools like PrimeTime/Tempus and drive closure. Collaborate closely with RTL designers, DFT, STA, and verification...
System on Chip (SOC) Digital Design Senior Principal Engineer, who will be responsible for end to end SOC design development... state of the art. About the Role As SOC Design Lead one will be responsible for driving complex SOC project...
Job Requirements Job Description Job Title: Senior Gate-Level Simulation (GLS) Verification Engineer Location... skilled and meticulous Gate-Level Simulation (GLS) Verification Engineer to serve as the last line of defense before silicon...
_ MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to microarchitect , design and deliver data fabric IP... with verification to ensure design quality. THE PERSON: You have a passion for modern, complex processor architecture, digital...
innovation across teams and projects. As a Principal Engineer in the Physical Design team, you will: Architect and lead the..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise...
. Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning... of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part...
About the Role As a Staff Analog Design Engineer at Analog Devices, you will lead the design and development of complex analog..., ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Staff Analog Design Engineer...
, low-power, and ECO) and verification flow. Help to lead project/feature development from conception to deployment.... Job Title: Product Engineer II Grade: T2 Experience: 2-3 Years Location: Bangalore/India Cadence is a pivotal leader...
, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell’s Central Engineering Group... and Storage and ASIC businesses. From industry leading designs of high performance SerDes and PHY, analog front ends to IPs...
teams based in US and Italy. Your Impact Lead and mentor a team of verification engineers, driving the development...Meet the Team We are part of the Hardware Platform Group, with our team specializing in FPGA verification. Our work...
teams based in US and Italy. Your Impact Lead and mentor a team of verification engineers, driving the development...Meet the Team We are part of the Hardware Platform Group, with our team specializing in FPGA verification. Our work...
, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...
functions of Memory teams to meet systems specs. Define ASIC requirements for upcoming new NAND Flash based chips and design... management. Lead discussion of new modes for next generation of NAND Flash or new operation methods that can make...
to 10 years of work experience in ASIC IP cores design Required: Bachelor's, Electrical Engineering Preferred: Master... like USB/PCIE/Ethernet preferred. Work closely with the SoC verification and validation teams for pre/post Silicon debug...
, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Compute and Custom Solutions... infrastructure. Built on decades of expertise and execution, Marvell’s custom ASIC solution offers a differentiated approach...
autonomous devices like vehicles and robots to make more intelligent and safe decisions. Role Overview As a DFT Lead... and Implementing DFT methodologies for a high-performance LiDAR Chip. Owning DFT planning, Insertion, verification and validation...
, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Data Centre Engineering (DCE.../Enterprise and Automotive Compute market segments. The team focusses on the Custom ASIC business, Cloud AI solutions & Enterprise...