and subsystems Understanding the RTL design and Uarch of IPs and integrating them in sub-systems SoC IP Uarch definition and RTL... development Own RTL Quality Checks: Clock Domain Crossing (CDC) check, Lint, etc. Design for Testability (DFT) checks Low Power...
Digital IC Design Engineer - Digital Compute Team About Us At onsemi, we help improve lives through silicon solutions every... Digital IC Design Engineer with experiences in the development of embedded MCU/DSP systems. You will develop and benchmark...
Job Requirements 1. Lead – High Performance ARM Core Hardening Job Title: Lead Engineer – ARM Core Hardening... – SoC Implementation Key Responsibilities: Lead end-to-end RTL-to-GDSII hardening of ARM Cortex-A/X/Neoverse cores...
_ MTS SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification Lead) THE ROLE: The focus of this role is to plan... in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification of new... and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Radeon Technologies Group, you will help bring to life..., Perl/Shell scripting, and Verilog RTL design ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering...
Opportunity: UST is looking for LLM Engineer – On-Prem Deployment & Domain Tuning (Semiconductor Focus) Key Roles... & Responsibilities: · Design and implement secure, scalable, and efficient on-premises LLM infrastructure. Integrate LLMs with existing...
. Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning... verilog/system verilog RTL related to DFT logic design. ATE Test Readiness: Lead DFT-to-ATE handoff, including: Drive...
Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify...
information, visit us at www.wipro.com. Long Description 1. ASIC RTL Engineer Job Description: RTL, Coding, Design, IP... Design Verification Engineer Job Description: 7+ years of hands-on DV experience in SystemVerilog/UVM. Must be able...
. Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning... verilog/system verilog RTL related to DFT logic design. ATE Test Readiness: Lead DFT-to-ATE handoff, including: Drive...
_ PMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the AECG Custom ASIC Group, you will help bring to life cutting... management, package and floorplan team to come up with robust power delivery design. Work with RTL and PD team in coming up...
, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus. Candidate..., Mentoring Junior engineer - Partial Ability to lead MSV projects independently Drive enhancements in known methodologies...
Senior Staff Chip Verification Engineer Job Description In your new role you will: • Lead a team technically... Verilog/UVM test bench components and by integrating3rd party VIP components. Simulate and debug at RTL, Unit Delay, and Gate...
, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus. Candidate..., Mentoring Junior engineer - Partial Ability to lead MSV projects independently Drive enhancements in known methodologies...
_ SMTS SILICON DESIGN ENGINEER(Timing Constraints/STA Signoff Technical Lead) THE ROLE: As a member of the AECG ASIC... Group, you will help bring to life cutting-edge designs. As a member of the Back-end design/integration team, you will work...
_ SMTS SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification Lead) THE ROLE: The focus of this role is to plan... in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design...
, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Central Engineering (CCDS) - ASIC... India in Marvell is a Custom Logic Design and Methodology group responsible for delivering complex ASIC chips. This group...
on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture..., and play a key role in full chip design integration with the testability features coordinated in the RTL. Work closely...
. Knowledge in C++ programming . Design/RTL experience in Verilog or SV is an advantage. Knowledge of Ethernet protocols (IEEE..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Switch Business Unit in Marvell...