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Keywords: Lead Engineer - RTL Design, Location: Bangalore, Karnataka

Page: 6

Principal Engineer Verification

cases andSystem Verilog/UVM test bench components and by integrating 3rd partyVIP components. Simulate and debug at RTL... for functional and toggle coverage closure. Lead a team technically through exploring new environment andidentifying potential...

Company: Infineon
Posted Date: 25 Jun 2025

Senior Staff / Principal Engineer Chip Verification

and by integrating 3rd partyVIP components. Simulate and debug at RTL, Unit Delay, and Gate Level usingappropriate tools and flows... including Emulator, Portable Stimulus, orFormal methodologies for functional and toggle coverage closure. Lead a team...

Company: Infineon
Posted Date: 25 Jun 2025

Engineer MSV

, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus. Candidate.... One should have proficiency in AMS simulation environment using Cadence/Synopsys/Mentor tools. Knowledge of digital design techniques, Verilog HDL...

Company: Infineon
Posted Date: 24 Jun 2025

Senior Engineer MSV

, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus. Candidate.... One should have proficiency in AMS simulation environment using Cadence/Synopsys/Mentor tools. Knowledge of digital design techniques, Verilog HDL...

Company: Infineon
Posted Date: 24 Jun 2025

Staff DFT Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Central Engineering (CCDS) - ASIC... India in Marvell is a Custom Logic Design and Methodology group responsible for delivering complex ASIC chips. This group...

Company: Marvell
Posted Date: 12 Jun 2025

Principal Engineer, Emulation

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Custom Compute and Storage (CCS..., from architecture and design all the way through layout, packaging, prototype validation and production ramp up. The Emulation Center...

Company: Marvell
Posted Date: 12 Jun 2025

Staff GPU Verification Engineer

methodology Have the opportunity to lead, coach and mentor other members of the team Participate in design and verification... and closure Participate in all stages of design specification definition providing feedback from the verification perspective...

Posted Date: 07 Jun 2025

Principal GPU Verification Engineer

verification methodologies. Lead, mentor, and support team members in verification activities. Engage in design and verification..., and report verification metrics to ensure closure. Provide verification-focused feedback during design specification discussions...

Posted Date: 04 Jun 2025

Associate I - VLSI Lib

of VLSI Frontend Backend or Analog design Outcomes: * Works as an individual contributor and on any one task of RTL Design... delivery as approved by the senior engineer Measures of Outcomes: * Quality –verified using relevant metrics by Lead Timely...

Company: UST
Posted Date: 18 Jul 2025

Associate III - VLSI PD

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... Knowledge Examples: Frontend / Backend / Analog Design:a. Project experience in any of the design by executing any one of – RTL...

Company: UST
Posted Date: 18 Jul 2025

Senior IP Micro-architect

Summary: We are seeking a highly skilled and experienced IP Design Engineer to join our dynamic team. The ideal candidate... will have a strong background in microarchitecture design, RTL design for complex IPs, and a deep understanding of AMBA or PCIe protocols. This role...

Company: Qualcomm
Posted Date: 06 Jul 2025

Associate III - VLSI STA

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... Knowledge Examples: Frontend / Backend / Analog Design:a. Project experience in any of the design by executing any one of – RTL...

Company: UST
Posted Date: 25 Jun 2025

Associate II - VLSI

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 18 Jun 2025

Associate III - VLSI PDN

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... Knowledge Examples: Frontend / Backend / Analog Design:a. Project experience in any of the design by executing any one of – RTL...

Company: UST
Posted Date: 25 May 2025

Associate III - VLSI STA

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... Knowledge Examples: Frontend / Backend / Analog Design:a. Project experience in any of the design by executing any one of – RTL...

Company: UST
Posted Date: 25 May 2025

Associate III - VLSI EMIR

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... Knowledge Examples: Frontend / Backend / Analog Design:a. Project experience in any of the design by executing any one of – RTL...

Company: UST
Posted Date: 25 May 2025