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Keywords: Low Power Design/Methodology Engineer, Location: San Diego, CA

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Low Power Design/Methodology Engineer

, conformal low power check, and formal verification for IP blocks. Work closely with technology/circuit design team to close IP... implementation. Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 15 May 2025

CPU Physical Design – Low Power Signoff Engineer

, verification, STA, Physical design, etc. Knowledge of low power flow (power gating, multi-Vt flow, power supply management... Engineer, you will lead innovative Central Processing Unit (CPU) design efforts that have a critical impact on industries...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 07 Jun 2025

Design Methodology Engineer

concepts and on-hands experience with PTPX etc. ⦁ Sound conceptual understanding of low power design techniques like voltage... Engineering General Summary: Qualcomm’s Design Technology team is seeking a motivated engineer to drive development...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 03 May 2025

Design Methodology Engineer

understanding of low power design techniques like voltage/power islands, power gating, clock gating, retention designs... Summary: Qualcomm's Design Technology team is seeking a motivated engineer to drive development of advanced methodologies...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 03 Jul 2025
Salary: $115600 - 173400 per year

SoC Power/Performance Post-Si Validation & Emulation Engineer

architectures, Low Power Design Techniques for different market segment products including mobile, compute and datacenter... Engineering General Summary: As a SoC Power/Performance Post-Si Validation & Emulation Engineer, you will be a vital member...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 08 Jun 2025

SoC Power Analysis and Optimization Engineer

experience is a plus SOC power modeling, low power design and power optimization experience is a plus Strong communication... optimization. - Working with SOC power team members to automate the power analysis and optimization tasks - Explore new methodology...

Company: Apple
Location: San Diego, CA
Posted Date: 12 Jun 2025

Design Verification Engineer

with low power design Experience working across and building relationships with cross-functional design, model and emulation..., and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an industry-leading group of researchers...

Company: Meta
Posted Date: 26 Jun 2025

Wireless SOC Design Verification Engineer

with low power design, UPF integration, boot-up, power-cycling, HW/FW interaction verification. Low Power Verification... types of SOC architectures, many high speed layered protocols, methodologies on low power architecture, best-in-class DV...

Company: Apple
Location: San Diego, CA
Posted Date: 20 Jun 2025

Digital Design Engineer

Engineering General Summary: Qualcomm’s is seeking a digital design engineer for the Design Technology team. The candidate... technologies and new low power circuits. This position is for the San Diego location only. Primary Job Responsibilities...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 31 May 2025
Salary: $115600 - 173400 per year

GNSS Design Verification Engineer

on every single Apple product? As a GNSS Design Verification Engineer, you will be responsible for pre-silicon RTL verification... block/subsystem level coverage model and add test cases to increase coverage. Low power verification and formal verification...

Company: Apple
Location: San Diego, CA
Posted Date: 30 May 2025
Salary: $115700 - 174200 per year

Wireless SOC Design Verification Engineer

and experience working with low power design, UPF integration, boot-up, power-cycling, HW/FW interaction verification. Knowledge... types of SOC architectures, many high-speed layered protocols, methodologies on low-power architecture, best-in-class DV...

Company: Apple
Location: San Diego, CA
Posted Date: 29 May 2025

Design Verification Engineer

with revision control systems like Mercurial(Hg), Git or SVN. Experience with low power design. Experience working..., and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a world-class group of researchers...

Company: Meta
Posted Date: 07 May 2025

Wireless PHY Design Verification Engineer

! In this role you will be responsible for ASIC pre-silicon verification of our extremely high efficiency and low power Wireless... PHY modem hardware including major controllers, blocks, subsystems, wireless protocols, DSP algorithms, low power...

Company: Apple
Location: San Diego, CA
Posted Date: 25 Jun 2025

Custom IP Design Engineer

highspeed and low power IP's (mini-macros) which are used across different sub-systems in SoC. In this position... consumption. Conduct design reviews and documentations. Flow and methodology enablement support. Close collaboration...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 28 Jun 2025
Salary: $115600 - 173400 per year

Cellular ASIC Design Integration Engineer

of the ASIC design flow, FE, Low power design and design verification, scripting. Strong knowledge of ASIC/SoC design flow... and development of cellular sub system. - Performing all aspects of front-end design flow including integration, power analysis...

Company: Apple
Location: San Diego, CA
Posted Date: 15 Jun 2025

Cellular ASIC Design Integration Engineer

design flow, FE, Low power design and design verification, scripting. Knowledge of ASIC/SoC design flow. Knowledge of FE..., etc.) Analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Experience in driving power...

Company: Apple
Location: San Diego, CA
Posted Date: 15 Jun 2025

Cellular ASIC Design Integration Engineer

flow, FE, Low power design and design verification, scripting. Knowledge of ASIC/SoC design flow. Knowledge of FE tools..., etc.) Analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Understanding of power...

Company: Apple
Location: San Diego, CA
Posted Date: 15 Jun 2025
Salary: $115700 - 174200 per year

Design Verification Engineer

using advanced verification methodology such as SystemVerilog/UVM, Analog/mixed signal simulation, Low power verification..., 0In and others. Preferred Qualifications: Experience with Low power design verification, Formal verification and Gate...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 20 Apr 2025

DFT Engineer (Server)

and verification of advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs. The...) techniques for low power and multi voltage domain designs. A strong fundamental knowledge of DFT is required Understanding...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 10 Apr 2025

GPU STA Engineer (San Diego/Austin)

for methodology development and flow optimization. Pushing PPA to best possible extent using knowledge of high performance and low... implementation aspects Familiar with digital flow design and industry standard tools used for RTL to GDS implementation Good...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 08 Apr 2025
Salary: $108500 - 162700 per year