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Keywords: Low Power Design/Methodology Engineer, Location: San Diego, CA

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Low Power Design/Methodology Engineer

. Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check... to integrate low power / power management IP solution into wireless SoC chips and front-end design flows. Work closely with system...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 22 Aug 2025

CPU Physical Design – Low Power Signoff Engineer

, verification, STA, Physical design, etc. Knowledge of low power flow (power gating, multi-Vt flow, power supply management... Engineer, you will lead innovative Central Processing Unit (CPU) design efforts that have a critical impact on industries...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 08 Jun 2025

SOC Verification and Methodology Engineer

product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and to Autonomous... and Methodology Engineer, you will be responsible for ensuring the quality and functionality of System-on-Chip (SOC) designs through...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 29 Aug 2025
Salary: $115600 - 173400 per year

Power Management Design Engineer

protocols like AHB, AXI, SPMI, I2C, SPI Experience in low power design methodology and clock domain crossing designs... Summary: Candidate will be responsible for design/developing next generation power control systems. Candidate...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 22 Aug 2025

SoC Power Analysis and Optimization Engineer

experience is a plus SOC power modeling, low power design and power optimization experience is a plus Strong communication... optimization. - Working with SOC power team members to automate the power analysis and optimization tasks - Explore new methodology...

Company: Apple
Location: San Diego, CA
Posted Date: 13 Jun 2025

Design Verification Engineer

with low power design Experience working across and building relationships with cross-functional design, model and emulation..., and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an industry-leading group of researchers...

Company: Meta
Posted Date: 25 Jun 2025

Wireless SOC Design Verification Engineer

with low power design, UPF integration, boot-up, power-cycling, HW/FW interaction verification. Low Power Verification... types of SOC architectures, many high speed layered protocols, methodologies on low power architecture, best-in-class DV...

Company: Apple
Location: San Diego, CA
Posted Date: 20 Jun 2025

Wireless PHY Design Verification Engineer

! In this role you will be responsible for ASIC pre-silicon verification of our extremely high efficiency and low power Wireless... PHY modem hardware including major controllers, blocks, subsystems, wireless protocols, DSP algorithms, low power...

Company: Apple
Location: San Diego, CA
Posted Date: 25 Jun 2025

Cellular ASIC Design Integration Engineer

of the ASIC design flow, FE, Low power design and design verification, scripting. Strong knowledge of ASIC/SoC design flow... and development of cellular sub system. - Performing all aspects of front-end design flow including integration, power analysis...

Company: Apple
Location: San Diego, CA
Posted Date: 15 Jun 2025

Cellular ASIC Design Integration Engineer

design flow, FE, Low power design and design verification, scripting. Knowledge of ASIC/SoC design flow. Knowledge of FE..., etc.) Analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Experience in driving power...

Company: Apple
Location: San Diego, CA
Posted Date: 15 Jun 2025

Cellular ASIC Design Integration Engineer

flow, FE, Low power design and design verification, scripting. Knowledge of ASIC/SoC design flow. Knowledge of FE tools..., etc.) Analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Understanding of power...

Company: Apple
Location: San Diego, CA
Posted Date: 14 Jun 2025
Salary: $115700 - 174200 per year

Senior Electronics Engineer

professional, knowledgeable, and dedicated to getting the job done. For more info, check out . Role: Senior Electronics Engineer... your methodology accordingly. You've produced documentation for board assembly, to facilitate firmware development, and to communicate...

Company: Seasats
Location: San Diego, CA
Posted Date: 06 Aug 2025
Salary: $120000 - 140000 per year

SOC Verification Engineer

, industry-standard low power architecture, and build block / chip level testbench using best-in-class verification methodology..., Emulation, Design Verification, Test and Validation, and FW/SW engineering. As a SOC Verification Engineer...

Company: Apple
Location: San Diego, CA
Posted Date: 25 Jul 2025

DFT Engineer (Server)

of advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs. The successful candidate... in the implementation and verification of advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 30 Aug 2025