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Keywords: Memory PHY RTL Design Engineer, Location: Santa Clara, CA

Page: 1

Memory PHY RTL Design Engineer

_ THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware... design for memory I/O PHY Digital Architecture development from pathfinding, coding, verification to physical implementation...

Posted Date: 30 Mar 2025

Senior Silicon Engineer

next stage in your career. Responsibilities: Own the micro-architecture specification and RTL development of design modules... OR equivalent experience. 5+ years of experience with RTL design and/or architecture experience. 5+ years of experience of DDR4~5...

Company: Microsoft
Location: Santa Clara, CA
Posted Date: 01 May 2025
Salary: $117200 per year