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Keywords: Mixed Signal Model Verification Engineer, Location: Santa Clara, CA

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Mixed Signal Model Verification Engineer

Hybrid Role in San Jose, CA Mixed Signal Model Verification Engineer MUST HAVE SKILLS: Extensive experience... a detail-oriented mixed signal model engineer to verify behavioral models written in SystemVerilog, both logic and real...

Company: LanceSoft
Location: Santa Clara, CA
Posted Date: 05 Dec 2025

Mixed Signal Model Verification Engineer

Hybrid Role in San Jose, CA Mixed Signal Model Verification Engineer MUST HAVE SKILLS: Extensive experience... a detail-oriented mixed signal model engineer to verify behavioral models written in SystemVerilog, both logic and real...

Company: LanceSoft
Location: Santa Clara, CA
Posted Date: 04 Dec 2025

Mixed Signal Model Verification Engineer

Verify behavioral models written in SystemVerilog (logic + RNM) for mixed-signal IP Write constraints and stimuli...-level implementations Analyze and interpret mixed-signal schematics to understand intended circuit functionality Modify...

Posted Date: 05 Dec 2025

Mixed Signal Model Verification Engineer

mixed signal model engineer to verify behavioral models written in SystemVerilog, both logic and real number. It... and understand the mixed signal circuit schematic to debug any mismatch between behavioral model and circuit transistor-level...

Company: Cynet Systems
Location: Santa Clara, CA
Posted Date: 05 Dec 2025

RF/Analog Design/Functional Modeling and Verification Engineer – AI/ML Enhanced

and debug behavioral models for event-driven and mixed-signal simulation based on analog circuit design. Create verification.... Knowledge of RF transceiver architectures, PLLs, ADCs, DACs. Experience with UVM and functional verification of RF/mixed...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 04 Nov 2025

Lead Analog SerDes Architect/Design Engineer

. Specify, architect and design low voltage and low power Mixed-Signal integrated circuits and work collaboratively with digital... with design of precision analog circuits like ADC/DACs. Experience with designing PAM4/NRZ links. Experience with Mixed signal...

Company: Intel
Location: Santa Clara, CA
Posted Date: 03 Dec 2025

Senior Hardware Engineer

Engineering Strong analog and digital circuit design skills and layout with mixed signal designs. Experience working with AWG... experience with designing PDN for high-speed DSP, RFICs, manage PI and SI requirements, actively guide layout engineer and manage...

Company: Intel
Location: Santa Clara, CA
Posted Date: 26 Nov 2025

Senior Firmware/Software Engineer

state machines, transitions, context saving, error handling Experience with mixed-signal (analog+digital) control... from the OSI model, with emphasis on the PHY up to the data link level Understanding of signal processing: histograms, BER...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 03 Nov 2025
Salary: $105470 - 158000 per year

Staff Firmware/Software Engineer

state machines, transitions, context saving, error handling Experience with mixed-signal (analog+digital) control... from the OSI model, with emphasis on the PHY up to the data link level Understanding of signal processing: histograms, BER...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 02 Nov 2025
Salary: $105470 - 158000 per year