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Keywords: Post-Silicon Validation Engineer, Location: San Jose, CA

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Python Methodology Engineer / Post Silicon Validation

-silicon validation · Hands-on experience interfacing with test equipment (e.g., oscilloscopes, signal analyzers, power...About the job you’re considering We are seeking a Python Methodology Engineer to develop Python scripts that automate...

Posted Date: 12 Oct 2025

Post-Silicon Validation Engineer

Post-Silicon Validation Engineer About Etched Etched is building AI chips that are hard-coded for individual model... and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up...

Company: Etched
Location: San Jose, CA
Posted Date: 11 Oct 2025

Post Silicon Validation Engineer

fast. Post Silicon Validation Engineer Mission: drive and yield, quality & reliability for the most advanced... AI accelerator on the market. Responsibilities & opportunities in this role: Bring-up & Silicon Characterization Validation...

Company: Groq
Location: San Jose, CA
Posted Date: 26 Sep 2025

Silicon Architect Lead / Principal Engineer

Silicon Architect Lead / Principal Engineer US Citizen or US Permanent Resident San Jose, California or remote..., and validation teams through pre/post-Si stages to ensure best-in-class PPA, microarchitecture. Requirements: BS/MS in EE/ECE...

Location: San Jose, CA
Posted Date: 16 Oct 2025

Validation Engineer - New College Grad

. The engineer will work on developing the validation environment across bench and system for performance specification... compliance using our PMIC designs. The engineer will require experience in application and validation of the Power Management IC...

Company: Rambus
Location: San Jose, CA
Posted Date: 12 Sep 2025
Salary: $66200 - 123000 per year

Staff Engineer Validation

-5 years of working experience related to post-silicon validation on bench Familiar with Python or any other programming...Implement and perform standard electrical compliance tests Perform PVT validation on DUT Analyze data and write...

Company: Infineon
Location: San Jose, CA
Posted Date: 17 Oct 2025

Platform Validation Engineering Lead

integrity, and overall system robustness. Post-Silicon Characterization: Collaborate on post-silicon validation efforts...Platform Validation Engineer Lead About Etched Etched is building AI chips that are hard-coded for individual model...

Company: Etched
Location: San Jose, CA
Posted Date: 12 Sep 2025

Senior Power Management Engineer

and domain handshakes. Support silicon bring up: assist with post silicon validation of retention sequences, isolation logic... integration Exposure to post silicon validation, lab bring up of power state transitions, and diagnostic logging...

Location: San Jose, CA
Posted Date: 16 Oct 2025

Software Engineer I

to create necessary post-silicon infrastructure, methodology and automation to allow tests executed in a timely and efficient... calls, FPGA, microcontroller interfaces, JTAG, I2C, SPI, SERDES, memory and many other interfaces. Execute post-silicon...

Posted Date: 08 Oct 2025
Salary: $88900 - 165100 per year

Senior RTL Design Engineer

project’s schedule. Help to improve and automate design process. Support post-silicon product bring-up/debug. PREFERRED... your career. THE ROLE: We are looking for a self-motivated senior design engineer to be part of a leading team to drive...

Posted Date: 08 Oct 2025

Senior Staff Firmware Engineer

bring‑up, and postsilicon validation. Perform hands‑on debugging in the lab using oscilloscopes, logic analyzers, JTAG/SWD... fast. Senior Staff Firmware Engineer Mission: Own the end‑to‑end development of low‑level firmware that brings Groq...

Company: Groq
Location: San Jose, CA
Posted Date: 04 Oct 2025

Senior Staff Hardware System Design Engineer

design of test boards for ASIC bring‑up and postsilicon validation, debugging hardware and firmware issues in a lab... fast. Senior Staff Hardware System Design Engineer Mission: Perform detailed circuit design and analysis...

Company: Groq
Location: San Jose, CA
Posted Date: 26 Sep 2025

Senior Technical Staff Engineer - Design for Test

DFT lead will be involved from the initial investigation and feasibility to tape-out, as well as silicon validation..., ATPG and mBIST test feature validation processes, and silicon debug activities. (6.) Communicate project status...

Company: Microchip
Location: San Jose, CA
Posted Date: 16 Oct 2025

System IP Design Verification Engineer

, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include... Analyze and solve issues found in gate-level and power-aware scenarios (UPF) Contribute to post-silicon debug activities...

Company: Prodapt
Location: San Jose, CA
Posted Date: 24 Sep 2025

System IP Design Verification Engineer

, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...) Contribute to post-silicon debug activities as needed Requirements Familiarity with ARM-based standards, for example CHI...

Company: Prodapt
Location: San Jose, CA
Posted Date: 23 Sep 2025