towards delivering with key design collaterals (timing constraints, UPF etc.). Desired Skillset: Good understanding of low power... teams as part of collaterals exchanges Knowledge of logic design principles along with timing and power implications...
/DL Applications Being part of this team will give you exposure to the design and verification of latest Qualcomm AI/ML.../DL IP's/Core Being a part of the DV Team, you will work on Functional , Formal Power aware and Gate level simulation...