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Keywords: RTL/Integration- Design Lead, Location: Bangalore, Karnataka

Page: 3

Technical Lead I - VLSI DFT

Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL... in integration at the top level Meeting functional spec / design guidelines 100% without any deviation or limitation Documentation...

Company: UST
Posted Date: 25 May 2025

Technical Lead I - VLSI

Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL... in integration at the top level Meeting functional spec / design guidelines 100% without any deviation or limitation Documentation...

Company: UST
Posted Date: 26 Apr 2025

High Performance DSP core Implementation Engineer, Sr Staff

design teams across various site Develop and maintain 3rd party tool integration and product enhancement routines... Should lead implementation flow development effort independently by working closely with design team and EDA vendors...

Company: Qualcomm
Posted Date: 06 Jul 2025

Senior DFT Engineer

verilog/system verilog RTL related to DFT logic design. ATE Test Readiness: Lead DFT-to-ATE handoff, including:  Drive.... Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning...

Company: Amazon
Posted Date: 29 Jun 2025

ASIC DFT Engineer || MBIST, Scan Insertion, JTAG, ATPG || Exp 7 to 12 Years

, and play a key role in full chip design integration with the testability features coordinated in the RTL. Work closely... on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture...

Company: Cisco Systems
Posted Date: 26 Jun 2025

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA...: Quality of the deliverables: * Ensure clean delivery of the design and module in-terms of ease in integration at the top level...

Company: UST
Posted Date: 25 Jun 2025

Senior Principal Engineer - 5G RAN FPGA

’s business goals, needs and general business environment creating software solutions. You will: Design and lead the effort.../Xilinx FPGA. Expert in integration of IP/RTL into Intel/Xilinx FPGA. Strong problem-solving and analytical skills.Agility...

Company: Dell
Posted Date: 25 Jun 2025

SMTS STA / Synthesis Engineer

_ SMTS SILICON DESIGN ENGINEER(Timing Constraints/STA Signoff Technical Lead) THE ROLE: As a member of the AECG ASIC... Group, you will help bring to life cutting-edge designs. As a member of the Back-end design/integration team, you will work...

Posted Date: 21 Jun 2025

Associate II - VLSI

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 19 Jun 2025

Staff DFT Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Central Engineering (CCDS) - ASIC... India in Marvell is a Custom Logic Design and Methodology group responsible for delivering complex ASIC chips. This group...

Company: Marvell
Posted Date: 12 Jun 2025

Senior Staff Engineer, DFT

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Switch DFX team in Data center..., implementation, verification, and post-silicon bring-up Collaborate with DFT team members for feature implementation, integration...

Company: Marvell
Posted Date: 11 Jun 2025

Associate III - VLSI PD INV

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA...: Quality of the deliverables: * Ensure clean delivery of the design and module in-terms of ease in integration at the top level...

Company: UST
Posted Date: 25 May 2025

Associate III - VLSI STA

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA...: Quality of the deliverables: * Ensure clean delivery of the design and module in-terms of ease in integration at the top level...

Company: UST
Posted Date: 25 May 2025

Associate III - VLSI PDN

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA...: Quality of the deliverables: * Ensure clean delivery of the design and module in-terms of ease in integration at the top level...

Company: UST
Posted Date: 25 May 2025

Associate III - VLSI DFT VERIF

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA...: Quality of the deliverables: * Ensure clean delivery of the design and module in-terms of ease in integration at the top level...

Company: UST
Posted Date: 25 May 2025

Associate III - VLSI STA

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA...: Quality of the deliverables: * Ensure clean delivery of the design and module in-terms of ease in integration at the top level...

Company: UST
Posted Date: 24 May 2025

Associate III - VLSI EMIR

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA...: Quality of the deliverables: * Ensure clean delivery of the design and module in-terms of ease in integration at the top level...

Company: UST
Posted Date: 24 May 2025

SoC Management Architect

integration of IPs into SoC designs. Technical Expertise: Experience of RTL design for complex SoC development using Verilog... Engineering General Summary: We are seeking a highly skilled and experienced SoC Management IP Design lead to join our team...

Company: Qualcomm
Posted Date: 04 May 2025