Job Title: STA/SDC Engineer Duration: 12+ Months Location: San Jose, CA Technical: Being a member of design team... who oversees fullchip STA/ SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing...
Position: SDC Engineer (eInfochips Inc) Job Description: Position: SDC Engineer (eInfochips Inc) Location: San..., and to bring fullchip SDC changes back to block level. Helping develop and apply methodology to ensure correctness and quality...
Technical: Being a member of design team who oversees fullchip STA/ SDCs and works with physical design and DFT teams... integration. Helping develop efficient methodology to promote block level SDCs to fullchip, and to bring fullchip SDC changes...
digital implementation & signoff flows (STA tools) Strong STA and SDC debugging abilities are required. Low power analysis...
, Design Compiler) Experience with EDA tools in the IC digital implementation & signoff flows (STA tools) Strong STA and SDC...
You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock... groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/STA tools and scripting for automation...