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Keywords: Senior ASIC Design Engineer, Location: Bangalore, Karnataka

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Senior ASIC Design Engineer - NOC IP

NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team... or equivalent simulation tools, debug tools like Debussy, GDB). Deep understanding of ASIC design flow including RTL design...

Company: Nvidia
Posted Date: 04 Jun 2025

Senior ASIC Design Engineer

NVIDIA is seeking best-in-class Design Verification (DV) Engineers to verify world’s leading Smart Network Interface... direct-memory access (RDMA) services to bandwidth- and latency-sensitive applications. The Networking Chip Design in India...

Company: Nvidia
Posted Date: 30 May 2025

ASIC - SoC Design Verification Engineer

_ SENIOR SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification) THE ROLE: The focus of this role is to plan, build..., and execute the verification of new and existing features for AMD’s custom silicon/ASIC designs, resulting in no bugs in the final...

Posted Date: 09 May 2025

Senior ASIC Power and Thermal Engineer

and amazing people. We seek a Senior Power and Thermal Engineer to join our dynamic and fast-paced Silicon Solution Group. As part... system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves...

Company: Nvidia
Posted Date: 09 Apr 2025

ASIC - SoC Design Verification

_ SENIOR SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification) THE ROLE: The focus of this role is to plan, build..., and execute the verification of new and existing features for AMD’s custom silicon/ASIC designs, resulting in no bugs in the final...

Posted Date: 09 May 2025

Senior SOC Design Engineer

and see how you can make a lasting impact on the world! NVIDIA System-On-Chip (SOC) group is hiring for a Senior SOC Design Engineer... timelines & goals while directly interacting with System Architecture, unit-level ASIC, Physical Design, CAD, Package Design...

Company: Nvidia
Posted Date: 12 Jun 2025

Senior Physical Design Engineer

_ SENIOR SILICON DESIGN ENGINEER ASIC Physical Design Engineer THE ROLE: The focus of this role in the AECG ASIC... and drive floorplanning and physical design flows for best in class ASIC solutions. KEY RESPONSIBILITIES: Implementing RTL...

Posted Date: 01 Jun 2025

Senior Staff Physical Design Engineer

. What You Can Expect As a Senior Staff Physical Design Engineer (PnR), you will be part of our Implementation team and responsible...-performance ASIC chips in leading-edge CMOS process technology. Work with design teams across various disciplines...

Company: Marvell
Posted Date: 31 May 2025

Senior Staff Physical Design Engineer

. What You Can Expect As a Senior Staff Physical Design Engineer (PnR), you will be part of our Implementation team and responsible...-performance ASIC chips in leading-edge CMOS process technology. Work with design teams across various disciplines...

Company: Marvell
Posted Date: 25 May 2025

Senior Digital Design Engineer

Job Description: Description: Responsibilities OnSemi is seeking a Senior Digital design Engineer, NEW PRODUCT... and digital, regarding overall project development progress and status Solid understanding of RTL design, CDC, ASIC synthesis...

Company: onsemi
Posted Date: 25 Mar 2025

DDR PHY Senior Staff/Manager Design Verification Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...'s degree in Electrical Engineering, Computer Engineering, or related field. 12+ years ASIC design verification, or related...

Company: Qualcomm
Posted Date: 15 Jun 2025

Senior Design Verification Engineer

over $9 billion in revenue with offices around the world. As a global leader in the design and manufacturing of analog... Verification engineer to join our team focusing on development of the next generation of ADI’s Gigabit Multimedia Serial Link...

Posted Date: 12 Jun 2025

Job Profile Senior Engineer, Digital Design Engineering

, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Sr Engineer, Digital Design... Job Description Design key digital blocks such as clocks, reset paths, memory controller, NVMs etc. in Verilog/ System Verilog with built...

Posted Date: 24 May 2025

Senior Engineer, Digital Design Engineering

, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Sr Engineer, Physical Design... Job Description Design key digital blocks such as data path IPs(DSP functions, accelrators) in Verilog/ System Verilog with built...

Posted Date: 09 May 2025

Senior Digital Verification design Engineer

, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Digital Verification Engineer... Analog Devices (ADI) has just over $9 billion in revenue with offices around the world. As a global leader in the design...

Posted Date: 08 May 2025

Senior Digital design Engineer

Job Description: Responsibilities: OnSemi is seeking a Sr. Digital design engineer, NEW PRODUCT DEVELOPMENT, Power... and leading Digital Design, Architecture and ASIC/Mixed signal chip developments The ideal candidate should have thorough...

Company: onsemi
Posted Date: 08 Apr 2025

Senior Staff Engineer - Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact This position is with ASIC design... all custom ASICs for all the OEM’s. We are looking for individuals with the domain of physical design having Block /Subsystem...

Company: Marvell
Posted Date: 28 May 2025

Senior Staff Engineer-Physical Design

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Posted Date: 14 May 2025

Senior Digital Design Engineer

& Trace, TZC, SMPU, SPU) and their integration requirements Package Digital IP for seamless integration into design flow... on Power/ Performance/ Area (PPA) and other key qualitative aspects such as design quality, Design For Testability, robustness...

Posted Date: 10 May 2025

Senior Digital Design Engineer

& Trace, TZC, SMPU, SPU) and their integration requirements Package Digital IP for seamless integration into design flow... on Power/ Performance/ Area (PPA) and other key qualitative aspects such as design quality, Design For Testability, robustness...

Posted Date: 08 May 2025