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Keywords: Senior Analog Verification/Modelling Engineer, Location: Bangalore, Karnataka

Page: 1

Senior Analog Verification/Modelling Engineer

Candidate will work as part of modelling the analog IP by means of Verilog/ system Verilog and able to support DV... in planning the modelling of analog /hard IP by means of Verilog and system Verilog. He is also expected to take part...

Company: Infineon
Posted Date: 07 Jan 2026

Principal Engineer Systems Design

verification. Collaborating with RF and Analog design teams in creation of the specs of the RF and modelling it in the simulation...As a Senior member in WLAN systems team you will play a key role spanning from development and implementation hardware...

Company: Infineon
Posted Date: 21 Nov 2025