NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem... crowd: Strong C/C++ programming experience Prior Design or Verification experience of dynamic memory controllers (ddr{2...
features: timer synchronization, interrupt controller, configuration access protocols, RAS and safety mechanisms Architecture... Debug/trace architecture, scan-dump, and memory dump mechanisms Strong expertise in power management for high-performance...
with VHDL hardware design languages, simulation and debug Familiarity with memory controller architecture, understanding... with design, verification and firmware teams to debug issues found on both prototyping and emulation platforms. Improve internal...