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Keywords: Senior Process Engineering Manager – Semiconductor Wet / CMP Process,
Location: Boise, ID
Page: 1
Senior Process Engineering Manager – Semiconductor Wet / CMP Process
career growth. Establish and maintain a best-in-class HVM DRAM Wet/CMP area with a strong focus on Safety, Quality... with equivalent experience. Proven experience leading processengineering team in an HVM/TD facility (5+ years). TD background...
